一种带有自检结构的管道进位相关和加法器的设计

2006 15th Asian Test Symposium Pub Date : 2006-11-20 DOI:10.1109/ATS.2006.7

Ming Li, Shiyi Xu, Jia-lin Cao, F. Ran, Shiwei Ma

{"title":"一种带有自检结构的管道进位相关和加法器的设计","authors":"Ming Li, Shiyi Xu, Jia-lin Cao, F. Ran, Shiwei Ma","doi":"10.1109/ATS.2006.7","DOIUrl":null,"url":null,"abstract":"In this paper a pipelined carry-dependent sum adder with the self-checking structure is proposed. The adder includes four 8-bit carry-dependent sum adder (CDSA) , a 4-bit block carry look-ahead unit (BCLU) and a parity checker. The necessary area of the proposed adder is only about 3.85% over the traditional ripple carry adders, while the sum of the traditional adders is delayed by 39.2% with respect to the proposed adder for 32-bit implementation","PeriodicalId":242530,"journal":{"name":"2006 15th Asian Test Symposium","volume":"85 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-11-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"A Design of Pipelined Carry-dependent Sum Adder With its Self-checking Structure\",\"authors\":\"Ming Li, Shiyi Xu, Jia-lin Cao, F. Ran, Shiwei Ma\",\"doi\":\"10.1109/ATS.2006.7\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper a pipelined carry-dependent sum adder with the self-checking structure is proposed. The adder includes four 8-bit carry-dependent sum adder (CDSA) , a 4-bit block carry look-ahead unit (BCLU) and a parity checker. The necessary area of the proposed adder is only about 3.85% over the traditional ripple carry adders, while the sum of the traditional adders is delayed by 39.2% with respect to the proposed adder for 32-bit implementation\",\"PeriodicalId\":242530,\"journal\":{\"name\":\"2006 15th Asian Test Symposium\",\"volume\":\"85 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-11-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 15th Asian Test Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ATS.2006.7\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 15th Asian Test Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATS.2006.7","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 4

摘要

本文提出了一种具有自检结构的管道进位相关和加法器。该加法器包括4个8位进位相关和加法器(CDSA)，一个4位块进位预读单元(BCLU)和奇偶校验器。所提出的加法器的必要面积仅比传统的纹波进位加法器的3.85%左右，而传统加法器的总和相对于所提出的32位实现的加法器延迟39.2%

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A Design of Pipelined Carry-dependent Sum Adder With its Self-checking Structure

In this paper a pipelined carry-dependent sum adder with the self-checking structure is proposed. The adder includes four 8-bit carry-dependent sum adder (CDSA) , a 4-bit block carry look-ahead unit (BCLU) and a parity checker. The necessary area of the proposed adder is only about 3.85% over the traditional ripple carry adders, while the sum of the traditional adders is delayed by 39.2% with respect to the proposed adder for 32-bit implementation

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2006 15th Asian Test Symposium

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