Transient behaviour of high voltage termination techniques

This paper presents some experimental and modelling results on two protection techniques currently used in both discrete and integrated devices, namely the biased ring and the SIPOS techniques. Both 2D simulations and macro models will be used to explain the physical working of a pin diode protected with one of the aforementioned technique submitted to a varying reverse bias, ranging from 50 V//spl mu/s up to 3000 V//spl mu/s. The results are compared to experimental data and are shown in good agreement. It appears from this work that the biased ring technique is rugged towards dV/dt up to 3000 V//spl mu/s, but the SIPOS one fails to protect the device for dV/dt equal to 300 V//spl mu/s.