闪存技术综述

K. Rajkanan
{"title":"闪存技术综述","authors":"K. Rajkanan","doi":"10.1109/MTDT.1996.782491","DOIUrl":null,"url":null,"abstract":"Since the first flash memory patent issued on October 6, 1987, flash memory’s multiple useful characteristics, including nonvolatility, in-circuit reprogrammability, low power consumption, and high density, have led it to become the fastest growing memory segment in recent years. Mobile computing and communication have driven the demand for flash memories. Nascent applications, such as digital cameras, personal digital assistants (PDA), digital telephone answering devices @TAD) are expected to further add to growth in flash memory demand. Typically, flash memories are descendants of EPROM or EEPROM technologies and therefore many similarities in the architecture and operation can be noticed. As in the case of EPROMs, flash devices based on NOR architecture and the hot-electron injection mechanism for programming still dominate the marketplace. To provide erasability, the Fowler-Nordheim tunneling mechanism is typically employed. However, booming demand for flash memory has set-off a ferment of new architectures, cell structures, and manufacturing processes. For mass storage applications, NAND architecture is emerging as a contender. AND and DiNOR (Divided bit-line NOR) architectures have also emerged, each having their own advantages and disadvantages. Requirements on low power, low voltages, and higher densities have led to the development of devices which use Fowler-Nordheim tunneling for both programming and erasing. Multilevel 1087-4852/96 $5.00","PeriodicalId":228146,"journal":{"name":"IEEE International Workshop on Memory Technology, Design and Testing,","volume":"49 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-08-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Flash memory technology - a review\",\"authors\":\"K. Rajkanan\",\"doi\":\"10.1109/MTDT.1996.782491\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Since the first flash memory patent issued on October 6, 1987, flash memory’s multiple useful characteristics, including nonvolatility, in-circuit reprogrammability, low power consumption, and high density, have led it to become the fastest growing memory segment in recent years. Mobile computing and communication have driven the demand for flash memories. Nascent applications, such as digital cameras, personal digital assistants (PDA), digital telephone answering devices @TAD) are expected to further add to growth in flash memory demand. Typically, flash memories are descendants of EPROM or EEPROM technologies and therefore many similarities in the architecture and operation can be noticed. As in the case of EPROMs, flash devices based on NOR architecture and the hot-electron injection mechanism for programming still dominate the marketplace. To provide erasability, the Fowler-Nordheim tunneling mechanism is typically employed. However, booming demand for flash memory has set-off a ferment of new architectures, cell structures, and manufacturing processes. For mass storage applications, NAND architecture is emerging as a contender. AND and DiNOR (Divided bit-line NOR) architectures have also emerged, each having their own advantages and disadvantages. Requirements on low power, low voltages, and higher densities have led to the development of devices which use Fowler-Nordheim tunneling for both programming and erasing. Multilevel 1087-4852/96 $5.00\",\"PeriodicalId\":228146,\"journal\":{\"name\":\"IEEE International Workshop on Memory Technology, Design and Testing,\",\"volume\":\"49 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-08-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE International Workshop on Memory Technology, Design and Testing,\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MTDT.1996.782491\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE International Workshop on Memory Technology, Design and Testing,","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MTDT.1996.782491","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

自1987年10月6日第一个闪存专利发布以来,闪存的多种有用特性,包括非易失性、电路内可重编程性、低功耗和高密度,使其成为近年来增长最快的存储领域。移动计算和通信推动了对闪存的需求。数码相机、个人数字助理(PDA)、数字电话应答设备(tad)等新兴应用预计将进一步推动闪存需求的增长。通常,闪存是EPROM或EEPROM技术的后代,因此在架构和操作上可以注意到许多相似之处。与eprom的情况一样,基于NOR架构和用于编程的热电子注入机制的闪存设备仍然主导着市场。为了提供可擦除性,通常采用Fowler-Nordheim隧道机制。然而,快速增长的闪存需求引发了新架构、单元结构和制造工艺的发酵。对于大容量存储应用,NAND架构正在成为一个竞争者。AND和DiNOR(分割位线NOR)架构也出现了,它们各有优缺点。对低功率、低电压和高密度的要求导致了使用Fowler-Nordheim隧道进行编程和擦除的设备的发展。多层1087-4852/96 $5.00
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Flash memory technology - a review
Since the first flash memory patent issued on October 6, 1987, flash memory’s multiple useful characteristics, including nonvolatility, in-circuit reprogrammability, low power consumption, and high density, have led it to become the fastest growing memory segment in recent years. Mobile computing and communication have driven the demand for flash memories. Nascent applications, such as digital cameras, personal digital assistants (PDA), digital telephone answering devices @TAD) are expected to further add to growth in flash memory demand. Typically, flash memories are descendants of EPROM or EEPROM technologies and therefore many similarities in the architecture and operation can be noticed. As in the case of EPROMs, flash devices based on NOR architecture and the hot-electron injection mechanism for programming still dominate the marketplace. To provide erasability, the Fowler-Nordheim tunneling mechanism is typically employed. However, booming demand for flash memory has set-off a ferment of new architectures, cell structures, and manufacturing processes. For mass storage applications, NAND architecture is emerging as a contender. AND and DiNOR (Divided bit-line NOR) architectures have also emerged, each having their own advantages and disadvantages. Requirements on low power, low voltages, and higher densities have led to the development of devices which use Fowler-Nordheim tunneling for both programming and erasing. Multilevel 1087-4852/96 $5.00
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