C45SOI 40µm封装中高密度导线的挑战

L. B. Yew, S. C. Teck
{"title":"C45SOI 40µm封装中高密度导线的挑战","authors":"L. B. Yew, S. C. Teck","doi":"10.1109/IEMT.2010.5746743","DOIUrl":null,"url":null,"abstract":"For wirebonded IC package, the industry has moved from conventional ∼70um die pad pitch to ∼40um pad pitch for better device and cost performance. In addition to the finer pitch challenge, thinner wires have also been introduced. These process advances have led to wire shorting and wire sweep being critical in package reliability and production yield. In this study, a DOE was designed to evaluate various factors such as wire diameter, wire length, wire gaps and layout, and mold transfer speed effect on wire sweep. The test vehicle used is a 31×31mm2 Thermally Enhanced PBGA version II (TePBGA II). The main response monitored was wire sweep %. As it turned out. the results compiled showed that wire diameter is the dominant factor affecting wire sweep.. In order to continue to be able to use the thinner wires, the other secondary factors such as the wire length need to be reduced and wire layout to be optimized. The main portion of this paper describes the evaluation accomplished in minimizing wire sweep while allowing the use of thinner wires.","PeriodicalId":133127,"journal":{"name":"2010 34th IEEE/CPMT International Electronic Manufacturing Technology Symposium (IEMT)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"The challenges of high density wires in C45SOI 40µm package\",\"authors\":\"L. B. Yew, S. C. Teck\",\"doi\":\"10.1109/IEMT.2010.5746743\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"For wirebonded IC package, the industry has moved from conventional ∼70um die pad pitch to ∼40um pad pitch for better device and cost performance. In addition to the finer pitch challenge, thinner wires have also been introduced. These process advances have led to wire shorting and wire sweep being critical in package reliability and production yield. In this study, a DOE was designed to evaluate various factors such as wire diameter, wire length, wire gaps and layout, and mold transfer speed effect on wire sweep. The test vehicle used is a 31×31mm2 Thermally Enhanced PBGA version II (TePBGA II). The main response monitored was wire sweep %. As it turned out. the results compiled showed that wire diameter is the dominant factor affecting wire sweep.. In order to continue to be able to use the thinner wires, the other secondary factors such as the wire length need to be reduced and wire layout to be optimized. The main portion of this paper describes the evaluation accomplished in minimizing wire sweep while allowing the use of thinner wires.\",\"PeriodicalId\":133127,\"journal\":{\"name\":\"2010 34th IEEE/CPMT International Electronic Manufacturing Technology Symposium (IEMT)\",\"volume\":\"18 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 34th IEEE/CPMT International Electronic Manufacturing Technology Symposium (IEMT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEMT.2010.5746743\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 34th IEEE/CPMT International Electronic Manufacturing Technology Symposium (IEMT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEMT.2010.5746743","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3

摘要

对于线键集成电路封装,业界已经从传统的~ 70um晶片间距转向~ 40um晶片间距,以获得更好的器件和成本性能。除了更细的间距挑战外,还引入了更细的导线。这些工艺的进步导致线材短路和线材扫描对封装可靠性和成品率至关重要。在本研究中,设计了一个DOE来评估各种因素,如线材直径,线材长度,线材间隙和布局,以及模具传递速度对线材扫描的影响。试验车辆为31×31mm2热增强PBGA II型(TePBGA II),监测的主要响应是导线扫掠率。事实证明。结果表明,线材直径是影响线材扫描的主要因素。为了继续能够使用更细的导线,其他次要因素,如导线长度需要减少和导线布局优化。本文的主要部分描述了在允许使用更细的导线的同时最大限度地减少导线扫描所完成的评估。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
The challenges of high density wires in C45SOI 40µm package
For wirebonded IC package, the industry has moved from conventional ∼70um die pad pitch to ∼40um pad pitch for better device and cost performance. In addition to the finer pitch challenge, thinner wires have also been introduced. These process advances have led to wire shorting and wire sweep being critical in package reliability and production yield. In this study, a DOE was designed to evaluate various factors such as wire diameter, wire length, wire gaps and layout, and mold transfer speed effect on wire sweep. The test vehicle used is a 31×31mm2 Thermally Enhanced PBGA version II (TePBGA II). The main response monitored was wire sweep %. As it turned out. the results compiled showed that wire diameter is the dominant factor affecting wire sweep.. In order to continue to be able to use the thinner wires, the other secondary factors such as the wire length need to be reduced and wire layout to be optimized. The main portion of this paper describes the evaluation accomplished in minimizing wire sweep while allowing the use of thinner wires.
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