{"title":"一种新型宽带倒装芯片互连","authors":"J. Kim, D. Koh, T. Itoh","doi":"10.1109/EPEP.1997.634070","DOIUrl":null,"url":null,"abstract":"Flip chip interconnections with CPW structures are studied. A novel broadband flip chip interconnection design is proposed based on the results of the sensitivity analysis performed by the Finite Difference Time Domain (FDTD) method.","PeriodicalId":220951,"journal":{"name":"Electrical Performance of Electronic Packaging","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-10-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"A novel broadband flip chip interconnection\",\"authors\":\"J. Kim, D. Koh, T. Itoh\",\"doi\":\"10.1109/EPEP.1997.634070\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Flip chip interconnections with CPW structures are studied. A novel broadband flip chip interconnection design is proposed based on the results of the sensitivity analysis performed by the Finite Difference Time Domain (FDTD) method.\",\"PeriodicalId\":220951,\"journal\":{\"name\":\"Electrical Performance of Electronic Packaging\",\"volume\":\"13 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-10-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Electrical Performance of Electronic Packaging\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EPEP.1997.634070\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Electrical Performance of Electronic Packaging","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEP.1997.634070","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Flip chip interconnections with CPW structures are studied. A novel broadband flip chip interconnection design is proposed based on the results of the sensitivity analysis performed by the Finite Difference Time Domain (FDTD) method.
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