低功耗CMOS兼容二端NEMS的制造

S. Saha, M. Baghini, Mayank Goel, V. Rao
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引用次数: 0

摘要

与传统CMOS相比,纳米机电开关(NEMS)在超低功耗应用中起着降低漏电流的关键作用。这是因为在2端(2T) NEMS中两个金属板之间的气隙,即在关闭状态下几乎没有泄漏电流。在本文中,我们展示了一个CMOS兼容的NEMS,在环境条件下具有1.5 V的拉入电压,$\sim 150\ \Omega$导通状态电阻(RON), 15 ns导通延迟和109 ON/OFF电流比(ION/IOFF)。这项工作展示了电子束光刻(EBL)和室温(RT)双层剥离工艺的结合来实现NEMS。这种组合便于释放具有25纳米气隙和$1\ \mu m\times 1.5\ \mu m$光束尺寸的结构。这种低功率NEMS将用于各种低功率应用的零漏开关。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Fabrication of CMOS Compatible 2-terminal NEMS for Low Power Applications
Nano-electro-mechanical switch (NEMS) plays a key role to reduce the leakage current as compared to the traditional CMOS in ultra-low power applications. This is because of the air gap between two metal plates in 2-terminal (2T) NEMS i.e. there is almost zero leakage current while it's in OFF-state. In this paper, we demonstrate a CMOS compatible NEMS with 1.5 V pull-in voltage, $\sim 150\ \Omega$ ON-state resistance (RON), 15 ns turn ON delay, and 109 ON/OFF current ratio (ION/IOFF) in the ambient conditions. This work exhibits the combination of electron beam lithography (EBL) and a bilayer lift-off process at room temperature (RT) to realize the NEMS. This combination facilitates easy release of structures with an air gap of 25 nm and a beam size of $1\ \mu m\times 1.5\ \mu m$. This low power NEMS will be useful for the zero leakage switch for the variety of low power applications.
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