{"title":"低功耗CMOS兼容二端NEMS的制造","authors":"S. Saha, M. Baghini, Mayank Goel, V. Rao","doi":"10.1109/icee50728.2020.9776893","DOIUrl":null,"url":null,"abstract":"Nano-electro-mechanical switch (NEMS) plays a key role to reduce the leakage current as compared to the traditional CMOS in ultra-low power applications. This is because of the air gap between two metal plates in 2-terminal (2T) NEMS i.e. there is almost zero leakage current while it's in OFF-state. In this paper, we demonstrate a CMOS compatible NEMS with 1.5 V pull-in voltage, $\\sim 150\\ \\Omega$ ON-state resistance (RON), 15 ns turn ON delay, and 109 ON/OFF current ratio (ION/IOFF) in the ambient conditions. This work exhibits the combination of electron beam lithography (EBL) and a bilayer lift-off process at room temperature (RT) to realize the NEMS. This combination facilitates easy release of structures with an air gap of 25 nm and a beam size of $1\\ \\mu m\\times 1.5\\ \\mu m$. This low power NEMS will be useful for the zero leakage switch for the variety of low power applications.","PeriodicalId":436884,"journal":{"name":"2020 5th IEEE International Conference on Emerging Electronics (ICEE)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-11-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Fabrication of CMOS Compatible 2-terminal NEMS for Low Power Applications\",\"authors\":\"S. Saha, M. Baghini, Mayank Goel, V. Rao\",\"doi\":\"10.1109/icee50728.2020.9776893\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Nano-electro-mechanical switch (NEMS) plays a key role to reduce the leakage current as compared to the traditional CMOS in ultra-low power applications. This is because of the air gap between two metal plates in 2-terminal (2T) NEMS i.e. there is almost zero leakage current while it's in OFF-state. In this paper, we demonstrate a CMOS compatible NEMS with 1.5 V pull-in voltage, $\\\\sim 150\\\\ \\\\Omega$ ON-state resistance (RON), 15 ns turn ON delay, and 109 ON/OFF current ratio (ION/IOFF) in the ambient conditions. This work exhibits the combination of electron beam lithography (EBL) and a bilayer lift-off process at room temperature (RT) to realize the NEMS. This combination facilitates easy release of structures with an air gap of 25 nm and a beam size of $1\\\\ \\\\mu m\\\\times 1.5\\\\ \\\\mu m$. This low power NEMS will be useful for the zero leakage switch for the variety of low power applications.\",\"PeriodicalId\":436884,\"journal\":{\"name\":\"2020 5th IEEE International Conference on Emerging Electronics (ICEE)\",\"volume\":\"19 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-11-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 5th IEEE International Conference on Emerging Electronics (ICEE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/icee50728.2020.9776893\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 5th IEEE International Conference on Emerging Electronics (ICEE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/icee50728.2020.9776893","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Fabrication of CMOS Compatible 2-terminal NEMS for Low Power Applications
Nano-electro-mechanical switch (NEMS) plays a key role to reduce the leakage current as compared to the traditional CMOS in ultra-low power applications. This is because of the air gap between two metal plates in 2-terminal (2T) NEMS i.e. there is almost zero leakage current while it's in OFF-state. In this paper, we demonstrate a CMOS compatible NEMS with 1.5 V pull-in voltage, $\sim 150\ \Omega$ ON-state resistance (RON), 15 ns turn ON delay, and 109 ON/OFF current ratio (ION/IOFF) in the ambient conditions. This work exhibits the combination of electron beam lithography (EBL) and a bilayer lift-off process at room temperature (RT) to realize the NEMS. This combination facilitates easy release of structures with an air gap of 25 nm and a beam size of $1\ \mu m\times 1.5\ \mu m$. This low power NEMS will be useful for the zero leakage switch for the variety of low power applications.