{"title":"在高电压和高温下工作的精密集成电路的片上保护","authors":"James Zhao, J. Salcedo, J. Hajjar","doi":"10.1109/IRPS.2016.7574605","DOIUrl":null,"url":null,"abstract":"A new high voltage swing bipolar ESD (electrostatic discharge) protection device for enabling low leakage precision mixed-signal interface circuits (ICs) operating at high voltage (~ 40 V to 60 V) and high temperature (~125°C to 200°C) is presented. Under these operating conditions, parasitic structures in junction-isolated high voltage process technologies induce unexpected shift in the leakage current over time, leading to malfunction in the precision high voltage input/output interface circuit. A proposed device design addresses the low leakage targets at the mentioned operating conditions, while achieving the required ESD robustness of the high voltage interface for industrial applications.","PeriodicalId":172129,"journal":{"name":"2016 IEEE International Reliability Physics Symposium (IRPS)","volume":"21 1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"On-chip protection in precision integrated circuits operating at high voltage and high temperature\",\"authors\":\"James Zhao, J. Salcedo, J. Hajjar\",\"doi\":\"10.1109/IRPS.2016.7574605\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new high voltage swing bipolar ESD (electrostatic discharge) protection device for enabling low leakage precision mixed-signal interface circuits (ICs) operating at high voltage (~ 40 V to 60 V) and high temperature (~125°C to 200°C) is presented. Under these operating conditions, parasitic structures in junction-isolated high voltage process technologies induce unexpected shift in the leakage current over time, leading to malfunction in the precision high voltage input/output interface circuit. A proposed device design addresses the low leakage targets at the mentioned operating conditions, while achieving the required ESD robustness of the high voltage interface for industrial applications.\",\"PeriodicalId\":172129,\"journal\":{\"name\":\"2016 IEEE International Reliability Physics Symposium (IRPS)\",\"volume\":\"21 1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-09-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE International Reliability Physics Symposium (IRPS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IRPS.2016.7574605\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE International Reliability Physics Symposium (IRPS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IRPS.2016.7574605","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
摘要
提出了一种新型的高压摆极双极ESD(静电放电)保护装置,可使混合信号接口电路在高压(~ 40 V ~ 60 V)和高温(~125°C ~ 200°C)下实现低泄漏精度。在这些工作条件下,结隔离高压工艺技术中的寄生结构会引起泄漏电流随时间的意外变化,导致精密高压输入/输出接口电路故障。提出的器件设计解决了上述操作条件下的低泄漏目标,同时实现了工业应用所需的高压接口的ESD稳健性。
On-chip protection in precision integrated circuits operating at high voltage and high temperature
A new high voltage swing bipolar ESD (electrostatic discharge) protection device for enabling low leakage precision mixed-signal interface circuits (ICs) operating at high voltage (~ 40 V to 60 V) and high temperature (~125°C to 200°C) is presented. Under these operating conditions, parasitic structures in junction-isolated high voltage process technologies induce unexpected shift in the leakage current over time, leading to malfunction in the precision high voltage input/output interface circuit. A proposed device design addresses the low leakage targets at the mentioned operating conditions, while achieving the required ESD robustness of the high voltage interface for industrial applications.