高性能低成本Cu/超低k SiOC(k=2.0)互连与32nm及以上节点自形成势垒技术的集成

Y. Ohoka, Y. Ohba, A. Isobayashi, T. Hayashi, N. Komai, S. Arakawa, R. Kanamura, S. Kadomura
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引用次数: 5

摘要

提出了一种将高性能、低成本的Cu超低k (ULK) SiOC(k=2.0)混合互连与SiOC(k=2.65)硬掩膜结构相结合的方法。该方法将Cu/ULK互连与自形成的MnOx阻挡层结合在一起,该阻挡层具有比Cu合金更低的电阻和更高的可靠性。此外,具有MnOx阻挡层的双damascene (DD)互连具有优异的应力诱导空化性能和显著延长的电迁移寿命,并且不需要额外的封孔工艺。结果表明,这种自形成势垒工艺是最可行的32纳米节点Cu/ULK互连技术。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Integration of High Performance and Low Cost Cu/Ultra Low-k SiOC(k=2.0) Interconnects with Self-formed Barrier Technology for 32nm-node and Beyond
A method of integrating high performance and low-cost Cu ultra low-k (ULK) SiOC(k=2.0) hybrid interconnects with SiOC(k=2.65) hard mask structure has been developed. The method combines Cu/ULK interconnects with the self-formed MnOx barrier layer that was shown to have lower resistance and higher reliability than Cu alloys. Moreover, dual-damascene (DD) interconnects with MnOx barrier layer showed excellent stress-induced voiding performance and significantly longer electromigration lifetime and required no additional pore-sealing process. It is concluded that this self-formed barrier process is the most feasible technology for 32 nm-node Cu/ULK interconnects.
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