利用物理框架建模mosfet中的N和P BTI

2020 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) Pub Date : 2020-09-23 DOI:10.23919/SISPAD49475.2020.9241687

R. Tiwari, N. Choudhury, Tarun Samadder, S. Mukhopadhyay, N. Parihar, S. Mahapatra

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引用次数: 0

摘要

利用陷阱生成(TG)和电荷捕获(CT)对P沟道和N沟道高钾金属栅极(HKMG) mosfet的负偏置温度不稳定性(NBTI)和正偏置温度不稳定性(PBTI)进行了建模，并根据实测数据进行了验证。将TG(界面)的作用机理纳入TCAD，并分别通过独立实验进行验证。模拟了不同应力偏置(VG)和温度(T)下的BTI动力学。模拟了氮(N%)和等效氧化物厚度(EOT)对BTI大小及其时间、VG和T依赖性的影响。

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TCAD Incorporation of Physical Framework to Model N and P BTI in MOSFETs

Negative and Positive Bias Temperature Instabilities (NBTI, PBTI) respectively in P and N channel High-K Metal Gate (HKMG) MOSFETs are modeled by trap generation (TG) and charge trapping (CT) and validated against measured data. The mechanism of TG (interface) is incorporated into TCAD and is separately validated using independent experiments. BTI kinetics is modeled at different stress bias (VG) and temperature (T). Impacts of Nitrogen (N%) and Equivalent Oxide Thickness (EOT) scaling on the magnitude of BTI and its time, VG and T dependencies are modeled.

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2020 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)

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