深亚微米CMOS技术中ADC线性度测试的振荡内置自检

Koay Soon Chan, Nuzrul Fahmi Nordin, Kim Chon Chan, Terk Zyou Lok, C. W. Yong, A. Osseiran
{"title":"深亚微米CMOS技术中ADC线性度测试的振荡内置自检","authors":"Koay Soon Chan, Nuzrul Fahmi Nordin, Kim Chon Chan, Terk Zyou Lok, C. W. Yong, A. Osseiran","doi":"10.1109/ASQED.2013.6643589","DOIUrl":null,"url":null,"abstract":"This paper proposes an Oscillation BIST (OBIST) that is meant to test ADCs fabricated in sub 100nm processes. The design is intended to be capable of testing a 10-bit ADC that was designed in 40nm CMOS. The design scheme presents a simple analog stimulus generator that was designed in 40nm CMOS together with schematic based simulation results. There is also a description of a calibration circuit and a highlevel implementation of a BIST control system to run the BIST and to calculate static parameters such as Differential Non-linearity (DNL) and Integral Non-linearity (INL). Simulation results for the analog stimulus generator suggest that OBIST might still be a viable method to test ADCs despite device scaling to sub 100nm processes.","PeriodicalId":198881,"journal":{"name":"Fifth Asia Symposium on Quality Electronic Design (ASQED 2013)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Oscillation Built-In-Self-Test for ADC linearity testing in deep submicron CMOS technology\",\"authors\":\"Koay Soon Chan, Nuzrul Fahmi Nordin, Kim Chon Chan, Terk Zyou Lok, C. W. Yong, A. Osseiran\",\"doi\":\"10.1109/ASQED.2013.6643589\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper proposes an Oscillation BIST (OBIST) that is meant to test ADCs fabricated in sub 100nm processes. The design is intended to be capable of testing a 10-bit ADC that was designed in 40nm CMOS. The design scheme presents a simple analog stimulus generator that was designed in 40nm CMOS together with schematic based simulation results. There is also a description of a calibration circuit and a highlevel implementation of a BIST control system to run the BIST and to calculate static parameters such as Differential Non-linearity (DNL) and Integral Non-linearity (INL). Simulation results for the analog stimulus generator suggest that OBIST might still be a viable method to test ADCs despite device scaling to sub 100nm processes.\",\"PeriodicalId\":198881,\"journal\":{\"name\":\"Fifth Asia Symposium on Quality Electronic Design (ASQED 2013)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-10-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Fifth Asia Symposium on Quality Electronic Design (ASQED 2013)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASQED.2013.6643589\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Fifth Asia Symposium on Quality Electronic Design (ASQED 2013)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASQED.2013.6643589","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

摘要

本文提出了一种用于测试亚100nm制程adc的振荡BIST (OBIST)。该设计旨在能够测试在40nm CMOS中设计的10位ADC。提出了一种简单的40nm CMOS模拟刺激发生器设计方案,并给出了基于原理图的仿真结果。还描述了校准电路和BIST控制系统的高级实现,以运行BIST并计算静态参数,如微分非线性(DNL)和积分非线性(INL)。模拟刺激发生器的仿真结果表明,尽管器件缩放到100nm以下工艺,OBIST仍然可能是测试adc的可行方法。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Oscillation Built-In-Self-Test for ADC linearity testing in deep submicron CMOS technology
This paper proposes an Oscillation BIST (OBIST) that is meant to test ADCs fabricated in sub 100nm processes. The design is intended to be capable of testing a 10-bit ADC that was designed in 40nm CMOS. The design scheme presents a simple analog stimulus generator that was designed in 40nm CMOS together with schematic based simulation results. There is also a description of a calibration circuit and a highlevel implementation of a BIST control system to run the BIST and to calculate static parameters such as Differential Non-linearity (DNL) and Integral Non-linearity (INL). Simulation results for the analog stimulus generator suggest that OBIST might still be a viable method to test ADCs despite device scaling to sub 100nm processes.
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