砷离子注入高k/金属嵌套多晶硅栅极堆的平带电压漂移研究

2011 Proceedings of the European Solid-State Device Research Conference (ESSDERC) Pub Date : 2011-10-13 DOI:10.1109/ESSDERC.2011.6044230

B. Kim, Y. Ji, Seungmi Lee, B.K. Jeon, Kee-jeung Lee, K. Hong, Sungki Park

{"title":"砷离子注入高k/金属嵌套多晶硅栅极堆的平带电压漂移研究","authors":"B. Kim, Y. Ji, Seungmi Lee, B.K. Jeon, Kee-jeung Lee, K. Hong, Sungki Park","doi":"10.1109/ESSDERC.2011.6044230","DOIUrl":null,"url":null,"abstract":"The origin of flat band voltage shift phenomena using arsenic ion-implant in High-k/Metal Inserted Poly Si (HK/MIPS) gate stacks was investigated. Arsenic ion-implantations were carried out on HfSiO and HfSiON dielectric layers. Precise arsenic profile was obtained through front and backside SIMS analysis. From the electrical and physical analysis, we verified that the flat band voltage was shifted due to an arsenic dipole formation at high-k/metal interface. The negative shift of 480mV was obtained with the optimized arsenic ion implant condition.","PeriodicalId":161896,"journal":{"name":"2011 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"The study of flat-band voltage shift using arsenic ion-implantation with High-k/Metal Inserted Poly Si gate stacks\",\"authors\":\"B. Kim, Y. Ji, Seungmi Lee, B.K. Jeon, Kee-jeung Lee, K. Hong, Sungki Park\",\"doi\":\"10.1109/ESSDERC.2011.6044230\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The origin of flat band voltage shift phenomena using arsenic ion-implant in High-k/Metal Inserted Poly Si (HK/MIPS) gate stacks was investigated. Arsenic ion-implantations were carried out on HfSiO and HfSiON dielectric layers. Precise arsenic profile was obtained through front and backside SIMS analysis. From the electrical and physical analysis, we verified that the flat band voltage was shifted due to an arsenic dipole formation at high-k/metal interface. The negative shift of 480mV was obtained with the optimized arsenic ion implant condition.\",\"PeriodicalId\":161896,\"journal\":{\"name\":\"2011 Proceedings of the European Solid-State Device Research Conference (ESSDERC)\",\"volume\":\"21 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-10-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 Proceedings of the European Solid-State Device Research Conference (ESSDERC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSDERC.2011.6044230\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 Proceedings of the European Solid-State Device Research Conference (ESSDERC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSDERC.2011.6044230","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 2

摘要

研究了砷离子注入高k/金属镶嵌多晶硅栅极堆中产生平带电压漂移现象的原因。在HfSiO和HfSiON介质层上进行了砷离子注入。通过前后SIMS分析，获得了精确的砷谱。通过电学和物理分析，我们证实了在高k/金属界面上砷偶极子的形成导致了平带电压的移动。在优化的砷离子注入条件下，获得了480mV的负位移。

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The study of flat-band voltage shift using arsenic ion-implantation with High-k/Metal Inserted Poly Si gate stacks

The origin of flat band voltage shift phenomena using arsenic ion-implant in High-k/Metal Inserted Poly Si (HK/MIPS) gate stacks was investigated. Arsenic ion-implantations were carried out on HfSiO and HfSiON dielectric layers. Precise arsenic profile was obtained through front and backside SIMS analysis. From the electrical and physical analysis, we verified that the flat band voltage was shifted due to an arsenic dipole formation at high-k/metal interface. The negative shift of 480mV was obtained with the optimized arsenic ion implant condition.

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2011 Proceedings of the European Solid-State Device Research Conference (ESSDERC)

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