与薄SOI技术兼容的加速度计NEMS器件

2007 2nd IEEE International Conference on Nano/Micro Engineered and Molecular Systems Pub Date : 2007-04-23 DOI:10.1109/NEMS.2007.352257

E. Oiller, L. Duraffourg, M. Delaye, H. Grange, S. Deneuville, J. Bernos, R. Dianoux, F. Marchi, D. Renaud, T. Baron, P. Andreucci, P. Robert

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引用次数: 15

摘要

本文提出了一种基于薄SOI技术并兼容“内嵌”集成的加速度计用薄SOI NEMS结构。卡西米力的建模、加速度计的设计、混合电子束/DUV光刻和fh蒸气释放的改进、特定AFM表征的开发，使得制造NEMS设备和提供AFM表征成为可能。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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NEMS Devices for Accelerometers Compatible with Thin SOI Technology

The paper presents thin SOI NEMS structures for accelerometers based on thin SOI technology and compatible with "in-IC" integration. Modeling of Casimir force, design of accelerometers, improvement of hybrid e-beam/DUV lithography and FH-vapor release, development of specific AFM characterizations have allowed to fabricate NEMS devices and to provide AFM characterizations.

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来源期刊

2007 2nd IEEE International Conference on Nano/Micro Engineered and Molecular Systems

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