ErrorTracer:基于故障模拟的设计错误诊断方法

Shi-Yu Huang, K. Cheng, Kuang-Chien Chen, D. I. Cheng
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引用次数: 48

摘要

本文研究了错误组合电路中错误源的定位问题。我们使用基于故障模拟的技术来近似每个信号的校正功率。特定信号的校正能力是用信号的可校正集来衡量的,即通过重新合成信号可以校正的错误输入向量的最大集。只有能够纠正每个错误输入向量的信号才被认为是潜在的误差源。与现有方法相比,我们的算法有三个主要优点。首先,与符号方法不同,它适用于大型电路。其次,它比其他基于仿真的方法提供更准确的结果,因为它基于更严格的条件来识别潜在的误差源。第三,它易于推广,可以识别多个误差。实验结果表明了该方法的有效性和高效性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
ErrorTracer: a fault simulation-based approach to design error diagnosis
This paper addresses the problem of locating error sources in an erroneous combinational circuit. We use a fault simulation-based technique to approximate each signal's correcting power. The correcting power of a particular signal is measured in terms of the signal's correctable set, namely, the maximum set of erroneous input vectors that can be corrected by re-synthesizing the signal. Only the signals that can correct every erroneous input vector are considered as a potential error source. Our algorithm offers three major advantages over existing methods. First, unlike symbolic approaches, it is applicable for large circuits. Secondly, it delivers more accurate results than other simulation-based approaches because it is based on a more stringent condition for identifying potential error sources. Thirdly, it can be easily generalized to identify multiple errors. Experimental results on diagnosing circuits with one and two random errors are presented to show the effectiveness and efficiency of this new approach.
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