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引用次数: 0
摘要
为了克服与SOI薄膜完全硅化相关的源/漏电阻问题，我们使用了一种高架源/漏结构，其中通道区域通过局部氧化和湿蚀刻变薄，而源/漏区域保持厚。这种结构实现了NMOS的源极/漏极电阻小至300欧姆-/spl μ m /m，这使得深亚微米薄膜SOI/ mosfet的高驱动电流成为可能。
High performance submicron SOI/CMOS with an elevated source/drain structure
To overcome the source/drain resistance problem associated with complete silicidation of thin SOI films, we used an elevated source/drain structure in which the channel region was thinned by local oxidation and wet etch while the source/drain region remained thick. This structure achieved source/drain resistances as small as 300 ohm-/spl mu/m for NMOS, which made possible high drive currents in deep submicron thin-film SOI/MOSFETs.<>
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