{"title":"一种结合信道信息的NB-LDPC解码器存储算法","authors":"J. Ren, Xu Ding, Xiao-ning Xin, Hua-Han Chen","doi":"10.1109/ICICM50929.2020.9292206","DOIUrl":null,"url":null,"abstract":"To solve the problems of NAND Flash with the reduction of size and the increase of information stored in the storage unit, the erase life and reliability of Flash are reduced, this paper uses Non-binary Low-density Parity-check (NB-LDPC) hard decision technology solves these problems. By using methods such as excluding self-input messages and using initial channel messages in calculation, Compared with the traditional binary LDPC decoding algorithm, this algorithm can successfully perform fast decoding. When the bit error rate is less than 10−4, the coding gain was increased by at least 0.5 dB. Simulation results show that the algorithm can avoid low error leveling and significantly reduce the bit error rate in storage applications with high code length and high transmission rate, and improve the decoding success rate. It is conducive to the fast decoding of the memory. The research results can provide the necessary conditions for the accurate decoding and automated operation of the NAND Flash later.","PeriodicalId":364285,"journal":{"name":"2020 IEEE 5th International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"An NB-LDPC decoder Algorithm combined using channel information for Storage Application\",\"authors\":\"J. Ren, Xu Ding, Xiao-ning Xin, Hua-Han Chen\",\"doi\":\"10.1109/ICICM50929.2020.9292206\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"To solve the problems of NAND Flash with the reduction of size and the increase of information stored in the storage unit, the erase life and reliability of Flash are reduced, this paper uses Non-binary Low-density Parity-check (NB-LDPC) hard decision technology solves these problems. By using methods such as excluding self-input messages and using initial channel messages in calculation, Compared with the traditional binary LDPC decoding algorithm, this algorithm can successfully perform fast decoding. When the bit error rate is less than 10−4, the coding gain was increased by at least 0.5 dB. Simulation results show that the algorithm can avoid low error leveling and significantly reduce the bit error rate in storage applications with high code length and high transmission rate, and improve the decoding success rate. It is conducive to the fast decoding of the memory. The research results can provide the necessary conditions for the accurate decoding and automated operation of the NAND Flash later.\",\"PeriodicalId\":364285,\"journal\":{\"name\":\"2020 IEEE 5th International Conference on Integrated Circuits and Microsystems (ICICM)\",\"volume\":\"34 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-10-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE 5th International Conference on Integrated Circuits and Microsystems (ICICM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICICM50929.2020.9292206\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE 5th International Conference on Integrated Circuits and Microsystems (ICICM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICM50929.2020.9292206","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An NB-LDPC decoder Algorithm combined using channel information for Storage Application
To solve the problems of NAND Flash with the reduction of size and the increase of information stored in the storage unit, the erase life and reliability of Flash are reduced, this paper uses Non-binary Low-density Parity-check (NB-LDPC) hard decision technology solves these problems. By using methods such as excluding self-input messages and using initial channel messages in calculation, Compared with the traditional binary LDPC decoding algorithm, this algorithm can successfully perform fast decoding. When the bit error rate is less than 10−4, the coding gain was increased by at least 0.5 dB. Simulation results show that the algorithm can avoid low error leveling and significantly reduce the bit error rate in storage applications with high code length and high transmission rate, and improve the decoding success rate. It is conducive to the fast decoding of the memory. The research results can provide the necessary conditions for the accurate decoding and automated operation of the NAND Flash later.