高f/sub T/和f/sub max/硅双极晶体管,采用超高性能超自对准工艺技术,用于低能耗和超高速LSI

M. Ugajin, J. Kodate, Y. Kobayashi, S. Konaka, T. Sakai
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引用次数: 21

摘要

利用超高性能超自校准工艺技术(USST)开发了极高的f/sub T/(高达50 GHz)和f/sub max/(高达70 GHz)硅双极晶体管。该技术的特点是横向尺寸的大幅缩放和浅的、重掺杂的外部基结构。USST大大降低了基极-集电极结电容和基极电阻,因此在没有垂直缩放的情况下,f/sub max/大约是SST1C技术的两倍。所制备的ECL电路在开关电流为I/sub CS/=1.0 mA/G时的最小门延迟为16.5 ps。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Very-high f/sub T/ and f/sub max/ silicon bipolar transistors using ultra-high-performance super self-aligned process technology for low-energy and ultra-high-speed LSI's
Very-high f/sub T/ (up to 50 GHz) and f/sub max/ (up to 70 GHz) silicon bipolar transistors have been developed using Ultra-high-performance Super Self-aligned process Technology (USST). This technology is characterized by drastically-scaled lateral dimensions and shallow, heavily-doped extrinsic base structures. USST greatly reduces base-collector junction capacitance and base resistance, and hence makes f/sub max/ about twice as large as SST1C technology without vertical scaling. The fabricated ECL circuits show a minimum gate delay of 16.5 ps at a switching current of I/sub CS/=1.0 mA/G.
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