通过低温植入技术优化最先进的28nm核心/SRAM器件性能

C. L. Yang, C. I. Li, G. Lin, W. Chen, C. Tsai, Y. S. Huang, C. Fu, T. Y. Lu, H. Y. Wang, B. Hsu, C. T. Huang, M. Chan, J. Y. Wu, Y. C. Cheng, O. Cheng, B. Guo, S. Lu, H. Gossmann, B. Colombeau, I. Chen
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引用次数: 5

摘要

在本文中,我们证明了低温注入应用于源漏(SD)扩展,口袋/晕和SD形成,可以提高NMOS的核心和SRAM驱动电流,降低一个数量级的Ioff bulk (Ioffb)泄漏,同时降低SRAM缺陷。原子动力学蒙特卡罗(KMC)模型证实了低温注入对NMOS通道/光晕区活性硼和点缺陷分布的独特控制。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Optimizing state-of-the-art 28nm core/SRAM device performance by cryo-implantation technology
In this paper, we have demonstrated that cryogenic implantation applied to source and drain (SD) extension, pocket/halo and SD formation offers advantages for higher core and SRAM driving current and one order lower Ioff bulk (Ioffb) leakage in NMOS with reduced SRAM defectivity. Atomistic Kinetic Monte Carlo (KMC) modeling confirms that the cryo-implantation has enabled a unique control of active Boron and point defect distribution in the channel/halo region of NMOS.
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