{"title":"用于集成电路诊断和故障分析的特征分析","authors":"C. Henderson, J. Soden","doi":"10.1109/TEST.1997.639632","DOIUrl":null,"url":null,"abstract":"A method of signature analysis is presented that is based on ATE data, experiential knowledge of failure modes and mechanisms, or a combination of both. This method can be used on low numbers of failures or even single failures. It uses the Dempster-Shafer theory to calculate failure mechanism confidence. This method can be used for rapid diagnosis of complex IC failures. The model is developed and an example is given based on Sandia's 0.5 /spl mu/m CMOS IC technology.","PeriodicalId":186340,"journal":{"name":"Proceedings International Test Conference 1997","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"25","resultStr":"{\"title\":\"Signature analysis for IC diagnosis and failure analysis\",\"authors\":\"C. Henderson, J. Soden\",\"doi\":\"10.1109/TEST.1997.639632\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A method of signature analysis is presented that is based on ATE data, experiential knowledge of failure modes and mechanisms, or a combination of both. This method can be used on low numbers of failures or even single failures. It uses the Dempster-Shafer theory to calculate failure mechanism confidence. This method can be used for rapid diagnosis of complex IC failures. The model is developed and an example is given based on Sandia's 0.5 /spl mu/m CMOS IC technology.\",\"PeriodicalId\":186340,\"journal\":{\"name\":\"Proceedings International Test Conference 1997\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"25\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings International Test Conference 1997\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TEST.1997.639632\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings International Test Conference 1997","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TEST.1997.639632","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Signature analysis for IC diagnosis and failure analysis
A method of signature analysis is presented that is based on ATE data, experiential knowledge of failure modes and mechanisms, or a combination of both. This method can be used on low numbers of failures or even single failures. It uses the Dempster-Shafer theory to calculate failure mechanism confidence. This method can be used for rapid diagnosis of complex IC failures. The model is developed and an example is given based on Sandia's 0.5 /spl mu/m CMOS IC technology.