一种通用阈值逻辑门

1998 International Semiconductor Conference. CAS'98 Proceedings (Cat. No.98TH8351) Pub Date : 1998-10-06 DOI:10.1109/SMICND.1998.732326

A. Stokman, S. Cotofana, S. Vasilliadis

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引用次数: 12

摘要

电容性阈值逻辑(CTL)门的主要缺点在于阈值有效编程。由于每个门可能需要不同的参考电压来设置其阈值，因此实际上不可能使用这种方法构建具有多个门的电路。本文提出了一种新的电容可编程CTL (CP-CTL)方案，解决了CTL门的编程问题。并给出了一个32位加法器的CP-CTL实现。

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A versatile threshold logic gate

The main drawback of Capacitive Threshold Logic (CTL) gates relates to the threshold valid programming. Because each gate may require a different reference voltage to set its threshold it is practically impossible to use this approach to build circuits with more than a couple of gates. In this paper we propose a new scheme, the Capacitor Programmable CTL (CP-CTL), which alleviate the CTL gate programming issue. The CP-CTL implementation of a 32-bit adder as also presented.

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来源期刊

1998 International Semiconductor Conference. CAS'98 Proceedings (Cat. No.98TH8351)

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