{"title":"Flash Memory路线图","authors":"R. Shirota","doi":"10.1109/MTDT.2006.27","DOIUrl":null,"url":null,"abstract":"It has become 19 years, since the development of the NAND Flash started using 0.7..m rule in 1987. The speed of the scaling has been very fast and the period of the product of the new generation is less than 2 years. Now, design rule of the NAND Flash memory has become less than 70nm. There are some problems to interfere with the scaling of the memory cell. Basic idea to overcome these problems will be introduced in this talk.","PeriodicalId":320365,"journal":{"name":"2006 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT'06)","volume":"85 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-08-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Roadmap of the Flash Memory\",\"authors\":\"R. Shirota\",\"doi\":\"10.1109/MTDT.2006.27\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"It has become 19 years, since the development of the NAND Flash started using 0.7..m rule in 1987. The speed of the scaling has been very fast and the period of the product of the new generation is less than 2 years. Now, design rule of the NAND Flash memory has become less than 70nm. There are some problems to interfere with the scaling of the memory cell. Basic idea to overcome these problems will be introduced in this talk.\",\"PeriodicalId\":320365,\"journal\":{\"name\":\"2006 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT'06)\",\"volume\":\"85 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-08-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT'06)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MTDT.2006.27\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT'06)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MTDT.2006.27","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
It has become 19 years, since the development of the NAND Flash started using 0.7..m rule in 1987. The speed of the scaling has been very fast and the period of the product of the new generation is less than 2 years. Now, design rule of the NAND Flash memory has become less than 70nm. There are some problems to interfere with the scaling of the memory cell. Basic idea to overcome these problems will be introduced in this talk.