L. Goux, A. Fantini, G. Kar, Y. Chen, N. Jossart, R. Degraeve, S. Clima, B. Govoreanu, G. Lorenzo, G. Pourtois, D. Wouters, J. Kittl, L. Altimime, M. Jurczak
{"title":"通过基于理解的堆栈工程实现工作电流低于 500nA 的超低高性能 TiN\\Al2O3\\HfO2\\Hf\\TiN 双极 RRAM","authors":"L. Goux, A. Fantini, G. Kar, Y. Chen, N. Jossart, R. Degraeve, S. Clima, B. Govoreanu, G. Lorenzo, G. Pourtois, D. Wouters, J. Kittl, L. Altimime, M. Jurczak","doi":"10.1109/VLSIT.2012.6242510","DOIUrl":null,"url":null,"abstract":"We demonstrate sub-500nA switching and tunable set voltage by inserting thin Al2O3 layer in TiN\\HfO2\\Hf\\TiN RRAM cell. Stack engineering clearly led to novel insights into the switching phenomenology: (i) O-scavenging is key in the forming process and stack-asymmetry management; (ii) dielectric-stack thinning allows lower forming current; (iii) `natural' (asymmetry-induced) reset switching takes place close to the TiN anode; (iv) reset resistance is limited by material-barrier properties at TiN interface.","PeriodicalId":266298,"journal":{"name":"2012 Symposium on VLSI Technology (VLSIT)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"78","resultStr":"{\"title\":\"Ultralow sub-500nA operating current high-performance TiN\\\\Al2O3\\\\HfO2\\\\Hf\\\\TiN bipolar RRAM achieved through understanding-based stack-engineering\",\"authors\":\"L. Goux, A. Fantini, G. Kar, Y. Chen, N. Jossart, R. Degraeve, S. Clima, B. Govoreanu, G. Lorenzo, G. Pourtois, D. Wouters, J. Kittl, L. Altimime, M. Jurczak\",\"doi\":\"10.1109/VLSIT.2012.6242510\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We demonstrate sub-500nA switching and tunable set voltage by inserting thin Al2O3 layer in TiN\\\\HfO2\\\\Hf\\\\TiN RRAM cell. Stack engineering clearly led to novel insights into the switching phenomenology: (i) O-scavenging is key in the forming process and stack-asymmetry management; (ii) dielectric-stack thinning allows lower forming current; (iii) `natural' (asymmetry-induced) reset switching takes place close to the TiN anode; (iv) reset resistance is limited by material-barrier properties at TiN interface.\",\"PeriodicalId\":266298,\"journal\":{\"name\":\"2012 Symposium on VLSI Technology (VLSIT)\",\"volume\":\"34 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-06-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"78\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 Symposium on VLSI Technology (VLSIT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIT.2012.6242510\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 Symposium on VLSI Technology (VLSIT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2012.6242510","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Ultralow sub-500nA operating current high-performance TiN\Al2O3\HfO2\Hf\TiN bipolar RRAM achieved through understanding-based stack-engineering
We demonstrate sub-500nA switching and tunable set voltage by inserting thin Al2O3 layer in TiN\HfO2\Hf\TiN RRAM cell. Stack engineering clearly led to novel insights into the switching phenomenology: (i) O-scavenging is key in the forming process and stack-asymmetry management; (ii) dielectric-stack thinning allows lower forming current; (iii) `natural' (asymmetry-induced) reset switching takes place close to the TiN anode; (iv) reset resistance is limited by material-barrier properties at TiN interface.