{"title":"实时系统的集成硬件和软件故障注入环境","authors":"A. Benso, M. Rebaudengo, M. Reorda, P. Civera","doi":"10.1109/DFTVS.1998.732158","DOIUrl":null,"url":null,"abstract":"This paper describes a system suited to support the Fault Injection process for microprocessor-based embedded systems. The system exploits a low-cost hardware board to monitor the processor status, to activate the fault injection procedure, and to gather information about the fault-free system behavior required to implement a set of fault collapsing rules. The overall environment allows at-speed fault injection experiments with negligible intrusiveness in the target system, and can therefore be used to efficiently evaluate real-time systems dependability.","PeriodicalId":245879,"journal":{"name":"Proceedings 1998 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (Cat. No.98EX223)","volume":"2003 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-11-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"21","resultStr":"{\"title\":\"An integrated HW and SW fault injection environment for real-time systems\",\"authors\":\"A. Benso, M. Rebaudengo, M. Reorda, P. Civera\",\"doi\":\"10.1109/DFTVS.1998.732158\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes a system suited to support the Fault Injection process for microprocessor-based embedded systems. The system exploits a low-cost hardware board to monitor the processor status, to activate the fault injection procedure, and to gather information about the fault-free system behavior required to implement a set of fault collapsing rules. The overall environment allows at-speed fault injection experiments with negligible intrusiveness in the target system, and can therefore be used to efficiently evaluate real-time systems dependability.\",\"PeriodicalId\":245879,\"journal\":{\"name\":\"Proceedings 1998 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (Cat. No.98EX223)\",\"volume\":\"2003 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-11-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"21\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings 1998 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (Cat. No.98EX223)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DFTVS.1998.732158\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 1998 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (Cat. No.98EX223)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DFTVS.1998.732158","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An integrated HW and SW fault injection environment for real-time systems
This paper describes a system suited to support the Fault Injection process for microprocessor-based embedded systems. The system exploits a low-cost hardware board to monitor the processor status, to activate the fault injection procedure, and to gather information about the fault-free system behavior required to implement a set of fault collapsing rules. The overall environment allows at-speed fault injection experiments with negligible intrusiveness in the target system, and can therefore be used to efficiently evaluate real-time systems dependability.