System Power Integrity and radiation analysis of packaging by CMOS inverter

This paper focuses on Signal Integrity (SI) and Power Integrity (PI) integration characteristic research. The voltage fluctuation across the power supply of Integrity Circuit (IC) is called Simultaneous Switching Noise (SSN). The research emphasizes on the SSN generated from packages since the switching of I/O in chip. A CMOS inverter chip [1] is designed because of the simplicity of the model, the influence of packages and interconnects on signal quality can also be observed more clearly. It is utilized to evaluate and compare the effects of SSN generated from the Power Distribution Network (PDN) and the difference of transport channel quality for multiple signal paths on package. Besides, a well path design also has lower radiation for avoiding interfering chip. Make a radiation analysis of path designs. Finally, propose best and worst package designs.