Shimomura, Matsuzawa, Kimura, Hayashi, Hirai, Kanda
{"title":"用于高频模拟应用的网格阵列MOSFET (MA-MOS)","authors":"Shimomura, Matsuzawa, Kimura, Hayashi, Hirai, Kanda","doi":"10.1109/VLSIT.1997.623701","DOIUrl":null,"url":null,"abstract":"A 0.3 pm Mesh-mayed MaFET(MA-MOS) with ringshaped gate electrode is proposed for high-frequency analog applications. The MA-MOS achieves low noise figure (NFmin) of 0.6 dB at 2 GHz and high maximum oscillation frequency (finax) of 37 GHz, using non-salicide 0.25pm CMOS technology. The parasitic effects of MA-MOS for high frequency performance are farther discussed.","PeriodicalId":414778,"journal":{"name":"1997 Symposium on VLSI Technology","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":"{\"title\":\"A mesh-arrayed MOSFET (MA-MOS) for high-frequency analog applications\",\"authors\":\"Shimomura, Matsuzawa, Kimura, Hayashi, Hirai, Kanda\",\"doi\":\"10.1109/VLSIT.1997.623701\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 0.3 pm Mesh-mayed MaFET(MA-MOS) with ringshaped gate electrode is proposed for high-frequency analog applications. The MA-MOS achieves low noise figure (NFmin) of 0.6 dB at 2 GHz and high maximum oscillation frequency (finax) of 37 GHz, using non-salicide 0.25pm CMOS technology. The parasitic effects of MA-MOS for high frequency performance are farther discussed.\",\"PeriodicalId\":414778,\"journal\":{\"name\":\"1997 Symposium on VLSI Technology\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-06-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"11\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1997 Symposium on VLSI Technology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIT.1997.623701\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1997 Symposium on VLSI Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.1997.623701","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A mesh-arrayed MOSFET (MA-MOS) for high-frequency analog applications
A 0.3 pm Mesh-mayed MaFET(MA-MOS) with ringshaped gate electrode is proposed for high-frequency analog applications. The MA-MOS achieves low noise figure (NFmin) of 0.6 dB at 2 GHz and high maximum oscillation frequency (finax) of 37 GHz, using non-salicide 0.25pm CMOS technology. The parasitic effects of MA-MOS for high frequency performance are farther discussed.