E. Verlind, L. Claesen, M. Genoe, F. Proesmans, H. de Man
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Partial strength ordering applied to symbolic switch-level analysis
Presents the application of partially ordered strength sets within the symbolic switch-level analysis of digital MOS circuits, where until now only a straightforward approach using a total ordering was used. The paper gives a mathematical formulation for the analysis. The method has been implemented within the existing switch-level analyzer ANAMOS, and has been applied successfully to practical circuits.<>