[1992] Proceedings The European Conference on Design Automation

Functional abstraction and formal proof of digital circuits

Pub Date : 1992-03-16 DOI: 10.1109/EDAC.1992.205976 P. Deverchère, J. Madre, J. Guignet, M. Currat

Formalized timing diagrams

Pub Date : 1992-03-16 DOI: 10.1109/EDAC.1992.205958 G. Borriello

Accurate delay models for ECL logic synthesis

Pub Date : 1992-03-16 DOI: 10.1109/EDAC.1992.205901 R. Makowitz, A. Wild