一种表征MOSFET串联电阻不对称性的简单方法

Proceedings of the 2015 International Conference on Microelectronic Test Structures Pub Date : 2015-03-23 DOI:10.1109/ICMTS.2015.7106120

D. Tomaszewski, G. Gluszko, J. Malesinska, K. Domanski, M. Zaborowski, K. Kucharski, D. Szmigiel, A. Sierakowski

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引用次数: 3

摘要

提出了一种直接提取MOSFET源极/漏极个别串联电阻的方法。它是基于器件的I-V特性在饱和范围内测量的两种器件配置相对于源极和漏极倒置。饱和范围建模所需的阈值电压由非饱和范围的I-V特性确定。根据在ITE中制备的SOI mosfet的测量数据，将所提出的方法与其他方法进行了比较。

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A simple method for characterization of MOSFET serial resistance asymmetry

A method for a direct extraction of individual serial resistances of MOSFET source/drain electrodes is presented. It is based on the device I-V characteristics in a saturation range measured for two device configurations inverted with respect to source and drain electrodes. A threshold voltage necessary for the saturation range modeling is determined from the non-saturation range I-V characteristics. Based on the measurement data determined for the SOI MOSFETs fabricated in ITE the proposed method has been compared with other techniques.

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Proceedings of the 2015 International Conference on Microelectronic Test Structures

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