面向asic半导体工艺开发的通用测试芯片格式

ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures Pub Date : 1993-03-22 DOI:10.1109/ICMTS.1993.292911

C. Weber

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引用次数: 11

摘要

测试芯片和测试结构设计的新方法正在加速面向专用集成电路(ASIC)的CMOS工艺的引入。专门的测试芯片在适当的时间框架内解决质量可制造性和工艺集成问题。六种通用测试芯片设计格式以缩放布局规则代代重复。

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Generic test chip formats for ASIC-oriented semiconductor process development

A novel approach towards test chip and test structure design is accelerating the introduction of application specific integrated circuit (ASIC)-oriented CMOS process generations. Specialized test chips address quality manufacturability and process integration issues within the proper time frame. Six generic test chip design formats repeat from generation to generation with scaled layout rules.<>

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ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures

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