Probe point insertion for at-speed test

Some recent studies show that an at-speed sequential or functional test is better than a test executed at lower speed. Design-for-testability approaches based on full scan, partial scan, or silicon-based solutions like Crosscheck achieve very high stuck-at fault coverage. However, in all these cases, the tests have to be applied at speeds lower than the operation speed. In this paper, a design-for-test method which permits at-speed testing is introduced. The method is based on probe point insertion for improved observability. Improvements in fault coverage were made for all 16 of the ISCAS-80 benchmark circuits studied. Fault coverages between 99% and 100% were obtained for six circuits, and 100% ATG efficiency achieved on all but two circuits.<>