Jon Ren, Gaojie Wen, Bird Fan, Winter Wang, Xiaocui Li
{"title":"多引脚功能失效隔离方法研究","authors":"Jon Ren, Gaojie Wen, Bird Fan, Winter Wang, Xiaocui Li","doi":"10.1109/IPFA.2018.8452524","DOIUrl":null,"url":null,"abstract":"With the integration increasing of IC chip, the function is also getting more and more complicated. A single IC chip can have many functions. Different functions of the output require different output pins, the number of output pins increases from a few to hundreds. For a single IC chip, if an internal block is abnormal, it may affect many output pins. Most of the time, it is hard to find the relationship between these pins. In this paper, forcing method would be applied to identify the major failure pin from many abnormal pins quickly. This method can reduce a lot of microprobe analysis work, reduce the failure analysis time and increase the success rate of IC chip failure analysis.","PeriodicalId":382811,"journal":{"name":"2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Study on Multiple-pins Function Failure Isolation Method\",\"authors\":\"Jon Ren, Gaojie Wen, Bird Fan, Winter Wang, Xiaocui Li\",\"doi\":\"10.1109/IPFA.2018.8452524\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"With the integration increasing of IC chip, the function is also getting more and more complicated. A single IC chip can have many functions. Different functions of the output require different output pins, the number of output pins increases from a few to hundreds. For a single IC chip, if an internal block is abnormal, it may affect many output pins. Most of the time, it is hard to find the relationship between these pins. In this paper, forcing method would be applied to identify the major failure pin from many abnormal pins quickly. This method can reduce a lot of microprobe analysis work, reduce the failure analysis time and increase the success rate of IC chip failure analysis.\",\"PeriodicalId\":382811,\"journal\":{\"name\":\"2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)\",\"volume\":\"43 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-07-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IPFA.2018.8452524\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPFA.2018.8452524","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Study on Multiple-pins Function Failure Isolation Method
With the integration increasing of IC chip, the function is also getting more and more complicated. A single IC chip can have many functions. Different functions of the output require different output pins, the number of output pins increases from a few to hundreds. For a single IC chip, if an internal block is abnormal, it may affect many output pins. Most of the time, it is hard to find the relationship between these pins. In this paper, forcing method would be applied to identify the major failure pin from many abnormal pins quickly. This method can reduce a lot of microprobe analysis work, reduce the failure analysis time and increase the success rate of IC chip failure analysis.