自修复记忆系统的验证方法

Jin-Fu Li, Chun-Hsien Wu
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引用次数: 0

摘要

随着纳米级半导体技术的发展,内置自修复(BISR)技术是提高嵌入式存储器成品率的新兴技术。内置自修复内存系统通常由可修复内存核心、封装、内置自检(BIST)电路、保险丝组和内置冗余分析器组成。本文提出了一种内置自修复记忆系统的系统级验证方法。所提出的验证方法可以验证自修复记忆系统中包装器与自修复记忆体之间的连通性。此外,它还可以验证包装器放错位置的设计错误
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Verification Methodology for Self-Repairable Memory Systems
With the nanometer-scale semiconductor technology, built-in self-repair (BISR) schemes are emerging techniques for improving the yield of embedded memories. A built-in self-repairable memory system typically consists of repairable memory cores, wrappers, built-in self-test (BIST) circuit, fuse group, and built-in redundancy-analyzer. This paper presents a system-level verification methodology for built-in self-repairable memory systems. The proposed verification methodology can verify the connectivity between the wrappers and self-repairable memories in a self-repairable memory system. Also, it can verify the wrapper misplaced design errors
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