SOI-SIMOX衬底串扰的扩展研究

Proceedings of International Electron Devices Meeting Pub Date : 1995-12-10 DOI:10.1109/IEDM.1995.499318

A. Viviani, J. Raskin, D. Flandre, J. Colinge, D. Vanhoenacker

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引用次数: 39

摘要

本文通过对SOI-SIMOX衬底的二维器件模拟和测试结构的测量，分析了SOI-SIMOX衬底中的串扰现象。研究了衬底电阻率和保护环的影响。结果与标准CMOS技术的结果进行了比较。采用高电阻率衬底可显著降低串扰至10ghz。提出了一个简单的模型来解释和模拟这一现象。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Extended study of crosstalk in SOI-SIMOX substrates

This work analyzes crosstalk phenomena in SOI-SIMOX substrates by means of two-dimensional device simulations and measurements on test structures. The influence of the substrate resistivity and of guard rings is studied. The results are compared with those obtained for standard CMOS technology. A significant crosstalk reduction, up to 10 GHz, is obtained with high-resistivity substrates. A simple modeling is proposed to explain and simulate the phenomenon.

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Proceedings of International Electron Devices Meeting

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