{"title":"智能堆叠tm技术:3D层堆叠的工业解决方案","authors":"C. L. Blanchard, I. Radu, M. Sadaka, K. Landry","doi":"10.1109/ICICDT.2011.5783202","DOIUrl":null,"url":null,"abstract":"Smart Stacking™ is a wafer-to-wafer stacking technology of partially or fully processed wafers. This technology enables transferring very thin layers in a high volume manufacturing environment. The core technologies are surface conditioning, low temperature direct bonding and wafer thinning (figure 1). This technology is adapted for advanced semiconductor applications such as Back Side Illumination (BSI) CMOS Image Sensors (CIS) as well as 3D integration approaches [1,2].","PeriodicalId":402000,"journal":{"name":"2011 IEEE International Conference on IC Design & Technology","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-05-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Smart stackingTM technology: An industrial solution for 3D layer stacking\",\"authors\":\"C. L. Blanchard, I. Radu, M. Sadaka, K. Landry\",\"doi\":\"10.1109/ICICDT.2011.5783202\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Smart Stacking™ is a wafer-to-wafer stacking technology of partially or fully processed wafers. This technology enables transferring very thin layers in a high volume manufacturing environment. The core technologies are surface conditioning, low temperature direct bonding and wafer thinning (figure 1). This technology is adapted for advanced semiconductor applications such as Back Side Illumination (BSI) CMOS Image Sensors (CIS) as well as 3D integration approaches [1,2].\",\"PeriodicalId\":402000,\"journal\":{\"name\":\"2011 IEEE International Conference on IC Design & Technology\",\"volume\":\"11 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-05-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 IEEE International Conference on IC Design & Technology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICICDT.2011.5783202\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE International Conference on IC Design & Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICDT.2011.5783202","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Smart stackingTM technology: An industrial solution for 3D layer stacking
Smart Stacking™ is a wafer-to-wafer stacking technology of partially or fully processed wafers. This technology enables transferring very thin layers in a high volume manufacturing environment. The core technologies are surface conditioning, low temperature direct bonding and wafer thinning (figure 1). This technology is adapted for advanced semiconductor applications such as Back Side Illumination (BSI) CMOS Image Sensors (CIS) as well as 3D integration approaches [1,2].
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