{"title":"边界扫描混合管脚控制及其应用","authors":"W. Ke","doi":"10.1109/ATS.1996.555135","DOIUrl":null,"url":null,"abstract":"Boundary-Scan (B-S) has been widely used for interconnect testing. It allows all pins of a B-S chip to be controlled uniformly by either system or B-S logic. The requirement that all pins are controlled by the same logic limits B-S usage for many applications. We propose a new B-S instruction, called PINCONTROL, to allow mixed control of chip pins. That is, each pin can be individually configured to be controlled by the system or B-S logic. In this paper we shall demonstrate the application of this instruction for fault injection and inter-chip path delay testing.","PeriodicalId":215252,"journal":{"name":"Proceedings of the Fifth Asian Test Symposium (ATS'96)","volume":"60 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-11-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Hybrid pin control using boundary-scan and its applications\",\"authors\":\"W. Ke\",\"doi\":\"10.1109/ATS.1996.555135\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Boundary-Scan (B-S) has been widely used for interconnect testing. It allows all pins of a B-S chip to be controlled uniformly by either system or B-S logic. The requirement that all pins are controlled by the same logic limits B-S usage for many applications. We propose a new B-S instruction, called PINCONTROL, to allow mixed control of chip pins. That is, each pin can be individually configured to be controlled by the system or B-S logic. In this paper we shall demonstrate the application of this instruction for fault injection and inter-chip path delay testing.\",\"PeriodicalId\":215252,\"journal\":{\"name\":\"Proceedings of the Fifth Asian Test Symposium (ATS'96)\",\"volume\":\"60 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-11-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the Fifth Asian Test Symposium (ATS'96)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ATS.1996.555135\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the Fifth Asian Test Symposium (ATS'96)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATS.1996.555135","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Hybrid pin control using boundary-scan and its applications
Boundary-Scan (B-S) has been widely used for interconnect testing. It allows all pins of a B-S chip to be controlled uniformly by either system or B-S logic. The requirement that all pins are controlled by the same logic limits B-S usage for many applications. We propose a new B-S instruction, called PINCONTROL, to allow mixed control of chip pins. That is, each pin can be individually configured to be controlled by the system or B-S logic. In this paper we shall demonstrate the application of this instruction for fault injection and inter-chip path delay testing.