III-V栅极堆叠接口改进,实现高迁移率11nm节点CMOS

Y. T. Chen, J. Huang, J. Price, P. Lysaght, D. Veksler, C. Weiland, J. Woicik, G. Bersuker, R. Hill, J. Oh, P. Kirsch, R. Jammy, J. Lee
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引用次数: 2

摘要

我们报道了通过控制原子层沉积(ALD)氧化剂化学,可以显著改善高k/In0.53Ga0.47As界面质量。利用同步加速器光电发射建立了高k/InGaAs界面上的电数据和化学反应之间的逐步相关性。在无意的ALD表面氧化过程中形成的AsOx、GaOx和In2O3以及As-As键的增加是导致器件质量下降的原因。较好的h2o基高钾栅极堆叠表现为更小的电容电压(CV)色散(ZrO2为14%)、更小的CV滞后(Al2O3为37%、ZrO2为47%)、更少的边界陷阱(Qbr) (Al2O3为96%、ZrO2为25%)和更低的平均界面陷阱密度(Dit) (Al2O3为91%、ZrO2为29%)。因此,通过用H2O氧化剂代替O3,实现了Id和Gm的改进。我们的工作表明,h2o基高钾比o3基高钾更有前景。这些结果对行业在11纳米节点上的III-V CMOS的进展产生了积极的影响。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
III–V gate stack interface improvement to enable high mobility 11nm node CMOS
We report significant improvements in the high-k/In0.53Ga0.47As interface quality by controlling atomic layer deposition (ALD) oxidizer chemistry. A step-by-step correlation between electrical data and chemical reactions at the high-k/InGaAs interface has been established using synchrotron photoemission. AsOx, GaOx, and In2O3 formed during unintentional ALD surface oxidation and the increase of As-As bonds are responsible for degrading device quality. A better quality H2O-based high-k gate stack is evidenced by less capacitance-voltage (CV) dispersion (14% in ZrO2), smaller CV hysteresis (37% in Al2O3 and 47% in ZrO2), fewer border traps (Qbr) (96% in Al2O3 and 25% in ZrO2), and lower mean interface traps density (Dit) (91% in Al2O3 and 29% in ZrO2). Improvements in Id and Gm therefore have been achieved by replacing O3 with H2O oxidizer. Our work suggests that H2O-based high-k is more promising than O3-based high-k. These results positively impact the industry's progress toward III-V CMOS at the 11nm node.
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