补偿在制造和夹紧EUVL掩模期间引起的图像放置误差

R. Engelstad, J. Sohn, A. Mikkelson, M. Nataraju, K. Turner
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引用次数: 6

摘要

由于对65纳米以下图像放置(IP)误差的严格要求,在制造和使用过程中,必须尽量减少或纠正掩模失真的所有来源。对于极紫外光刻,由于曝光期间的非远心照明,掩模的非平整度也是至关重要的。本文概述了一种预测掩模在加工、电子束刀具夹持和曝光刀具夹持过程中产生的IP误差的方法。采用有限元模型模拟了各加载阶段的面外变形和面内变形。对有限元结果进行编译,以产生一组校正表,可以在电子束写入过程中实现,以补偿这些失真并显着提高IP精度。这篇论文的前一个版本出现在欧洲掩模和光刻会议(EMLC), SPIE, 6533, 653314(2007)。由于获得了EMLC的最佳论文奖,这篇论文已经更新,重新命名,并在这里发表。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Compensating for image placement errors induced during the fabrication and chucking of EUVL masks
With the stringent requirements on image placement (IP) errors in the sub-65-nm regime, all sources of mask distortion during fabrication and usage must be minimized or corrected. For extreme ultraviolet lithography, the nonflatness of the mask is critical as well, due to the nontelecentric illumination during exposure. This paper outlines a procedure to predict the IP errors induced on the mask during the fabrication processing, e-beam tool chucking, and exposure tool chucking. Finite element (FE) models are used to simulate the out-of-plane and in-plane distortions at each load step. The FE results are compiled to produce a set of Correction Tables that can be implemented during e-beam writing to compensate for these distortions and significantly increase IP accuracy. A previous version of this paper appeared in the Proceedings of the European Mask and Lithography Conference (EMLC), SPIE, 6533, 653314 (2007). The paper has been updated, retitled, and published here as a result of winning the Best Paper Award at the EMLC.
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