CMOS-SRAM软误差仿真系统

S. Satoh, R. Sude, H. Tashiro, N. Higaki, N. Nakayama
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引用次数: 3

摘要

介绍了一种用于CMOS-SRAM单元设计的软误差仿真系统。我们提出了一种新的噪声电流模型,并将其与SRAM等效电路相结合。模拟结果与强制暴露实验结果一致。我们的系统根据α粒子发射率、掩模布局和工艺条件预测场软错误率。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
CMOS-SRAM soft-error simulation system
A soft-error simulation system for designing CMOS-SRAM cells is presented. We propose a new noise current model and combine it with the SRAM's equivalent circuit. Simulation results agree with those from a compulsory exposure experiment. Our system predicts the field soft-error rate from the alpha-particle emission rate, mask layout, and process conditions.<>
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