A new drain voltage enhanced NBTI degradation mechanism [pMOSFETs]

Interface state generation and threshold voltage degradation for various channel length devices, stressed at different drain bias conditions, has been studied. It is found that the NBTI (negative bias temperature instability) effect decreases at low drain bias due to decrease in effective gate bias near the drain edge. The subsequent increase in degradation at higher drain stress bias is due to non-uniform generation of interface states and subsequent diffusion of generated hydrogen species along the length of the channel. This effect is more pronounced for short channel devices stressed at high temperatures and high drain bias.