基于可配置延迟块的故障灵敏度分析有效对策

S. Endo, Yang Li, N. Homma, K. Sakiyama, K. Ohta, T. Aoki
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引用次数: 26

摘要

本文提出了一种基于可配置延迟块(cdb)的有效对抗故障灵敏度分析(FSA)的方法。FSA是一种利用故障敏感性与秘密信息之间关系的新型故障攻击。以前的研究报道,它可以破坏配备了传统的差分故障分析(DFA)对策的加密模块,如冗余计算、掩码与或和波动态差分逻辑(WDDL)。该方法可以同时检测DFA和FSA攻击,基于设置时间违反错误。提出的想法是使用CDB作为检测的时间基础,并将该技术与Li的对策概念相结合,该概念消除了故障敏感性与秘密数据之间的依赖关系。延迟块的制造后配置允许最大限度地减少由制造变异性引起的工作频率开销。在本文中,我们提出了一种实现所提出的对策,并描述了其配置方法。我们还研究了在ASIC中为AES模块实现所提出的对策的硬件开销,并通过使用原型FPGA实现的实验证明了其有效性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
An Efficient Countermeasure against Fault Sensitivity Analysis Using Configurable Delay Blocks
In this paper, we present an efficient countermeasure against Fault Sensitivity Analysis (FSA) based on a configurable delay blocks (CDBs). FSA is a new type of fault attack which exploits the relationship between fault sensitivity and secret information. Previous studies reported that it could break cryptographic modules equipped with conventional countermeasures against Differential Fault Analysis (DFA) such as redundancy calculation, Masked AND-OR and Wave Dynamic Differential Logic (WDDL). The proposed countermeasure can detect both DFA and FSA attacks based on setup time violation faults. The proposed ideas are to use a CDB as a time base for detection and to combine the technique with Li's countermeasure concept which removes the dependency between fault sensitivities and secret data. Post-manufacture configuration of the delay blocks allows minimization of the overhead in operating frequency which comes from manufacture variability. In this paper, we present an implementation of the proposed countermeasure, and describe its configuration method. We also investigate the hardware overhead of the proposed countermeasure implemented in ASIC for an AES module and demonstrate its validity through an experiment using a prototype FPGA implementation.
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