{"title":"利用忆阻器状态变化行为识别光伏阵列故障","authors":"J. Mathew, M. Ottavi, Yunfan Yang, D. Pradhan","doi":"10.1109/DFT.2014.6962094","DOIUrl":null,"url":null,"abstract":"Memristor is an emerging non-volatile memory device that features smaller size and hybrid memristor/CMOS integration, which maximizes the advantages of high density and versatility. In this paper we utilize the memristor as weights and its state change behavior to capture some of the potential faults in a system. Photovoltaic arrays are taken as an example for the study. We will demonstrate that the state variations can be mapped into a timing which can be used as useful information for behavior of the system under measurement. Empirical studies are carried out using Spice based simulations to investigate into the impact of biasing and threshold voltages on timing behavior. Underpinning these studies, a relationship between input voltage and memristor state transition is proposed and extensively validated through further simulations to identify specific faulty behavior.","PeriodicalId":414665,"journal":{"name":"2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)","volume":"73 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Using memristor state change behavior to identify faults in photovoltaic arrays\",\"authors\":\"J. Mathew, M. Ottavi, Yunfan Yang, D. Pradhan\",\"doi\":\"10.1109/DFT.2014.6962094\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Memristor is an emerging non-volatile memory device that features smaller size and hybrid memristor/CMOS integration, which maximizes the advantages of high density and versatility. In this paper we utilize the memristor as weights and its state change behavior to capture some of the potential faults in a system. Photovoltaic arrays are taken as an example for the study. We will demonstrate that the state variations can be mapped into a timing which can be used as useful information for behavior of the system under measurement. Empirical studies are carried out using Spice based simulations to investigate into the impact of biasing and threshold voltages on timing behavior. Underpinning these studies, a relationship between input voltage and memristor state transition is proposed and extensively validated through further simulations to identify specific faulty behavior.\",\"PeriodicalId\":414665,\"journal\":{\"name\":\"2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)\",\"volume\":\"73 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-11-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DFT.2014.6962094\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DFT.2014.6962094","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Using memristor state change behavior to identify faults in photovoltaic arrays
Memristor is an emerging non-volatile memory device that features smaller size and hybrid memristor/CMOS integration, which maximizes the advantages of high density and versatility. In this paper we utilize the memristor as weights and its state change behavior to capture some of the potential faults in a system. Photovoltaic arrays are taken as an example for the study. We will demonstrate that the state variations can be mapped into a timing which can be used as useful information for behavior of the system under measurement. Empirical studies are carried out using Spice based simulations to investigate into the impact of biasing and threshold voltages on timing behavior. Underpinning these studies, a relationship between input voltage and memristor state transition is proposed and extensively validated through further simulations to identify specific faulty behavior.