{"title":"用于片上热梯度检测的低功耗CMOS温度传感器","authors":"S. Harb, W. Eisenstadt","doi":"10.1109/EPTC47984.2019.9076729","DOIUrl":null,"url":null,"abstract":"In this paper, a low-power CMOS temperature sensor based on a diode-connected NMOS FET is proposed. A sub-1V voltage reference is adopted to generate a temperature-invariant current source to bias the sensor device. The temperature sensing NMOS transistor is sized to maximize the temperature sensitivity. The proposed design is simulated based on 90 nm CMOS process technology, which shows temperature sensitivity of 0.25 mV/0C with a temperature range of from 00C to 1000C.","PeriodicalId":244618,"journal":{"name":"2019 IEEE 21st Electronics Packaging Technology Conference (EPTC)","volume":"97 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Low-Power CMOS Temperature Sensor for On-Chip Thermal Gradient Detection\",\"authors\":\"S. Harb, W. Eisenstadt\",\"doi\":\"10.1109/EPTC47984.2019.9076729\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a low-power CMOS temperature sensor based on a diode-connected NMOS FET is proposed. A sub-1V voltage reference is adopted to generate a temperature-invariant current source to bias the sensor device. The temperature sensing NMOS transistor is sized to maximize the temperature sensitivity. The proposed design is simulated based on 90 nm CMOS process technology, which shows temperature sensitivity of 0.25 mV/0C with a temperature range of from 00C to 1000C.\",\"PeriodicalId\":244618,\"journal\":{\"name\":\"2019 IEEE 21st Electronics Packaging Technology Conference (EPTC)\",\"volume\":\"97 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 IEEE 21st Electronics Packaging Technology Conference (EPTC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EPTC47984.2019.9076729\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE 21st Electronics Packaging Technology Conference (EPTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPTC47984.2019.9076729","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Low-Power CMOS Temperature Sensor for On-Chip Thermal Gradient Detection
In this paper, a low-power CMOS temperature sensor based on a diode-connected NMOS FET is proposed. A sub-1V voltage reference is adopted to generate a temperature-invariant current source to bias the sensor device. The temperature sensing NMOS transistor is sized to maximize the temperature sensitivity. The proposed design is simulated based on 90 nm CMOS process technology, which shows temperature sensitivity of 0.25 mV/0C with a temperature range of from 00C to 1000C.
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