电感和电感耦合对片上布线的重要性

Alina Deutsch, Howard H. Smith, G. Katopis, Wiren D. Becker, P. Coteus, C. Surovic, G. Kopcsay, Barry J. Rubin, R. P. Dunne, T. Gallo, D. R. Knebel, B. L. Krauter, L. M. Terman, G. Sai-Halasz, P. J. Reslte
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引用次数: 41

摘要

通过实验研究了电感和电感耦合对片上互连中精确延迟和串扰预测的重要性,并对五层布线结构中的前三层进行了研究,并制定了指导方针。以典型CMOS电路为例,分析了驱动和接收电路器件尺寸、线路长度和宽度对平面内、平面间串扰和时延的影响。简化的常参数分布式耦合线rlc电路表示近似于频率相关线路参数预测的波形是可行的。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
The importance of inductance and inductive coupling for on-chip wiring
The importance of inductance and inductive coupling for accurate delay and crosstalk prediction in on-chip interconnections is investigated experimentally for the top three layers in a five-layer wiring structure and guidelines are formulated. In-plane and between-plane crosstalk and delay dependence on driver and receiver circuit device sizes and line lengths and width are analyzed with representative CMOS circuits. Simplified constant-parameter, distributed coupled-line RLC-circuit representation that approximates the waveforms predicted with frequency-dependent line parameters is shown to be feasible.
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