{"title":"三维模堆中硅通孔垂直过渡的电传输特性","authors":"K. Chang, R. Weerasekera, S. Bhattacharya","doi":"10.1109/EPTC.2015.7412339","DOIUrl":null,"url":null,"abstract":"Two vertical transitions with through silicon vias (TSVs) in 3D die stack are designed and their high frequency electrical characteristics are presented in this paper. The two vertical transitions consist of TSVs for obtaining electrical connection between the die front side and back side. Back side redistribution layer is eliminated in the designs to simplify the fabrication process without sacrificing the electrical performance. Design considerations and guidelines are provided to design high speed TSV structure up to 50 GHz. Different kinds of transmission line interconnects (for instance, microstrip line and coplanar waveguide) are implemented at the input/output extensions for different applications. For both vertical transition designs, the simulated insertion loss is better than 0.65 dB up to 50 GHz while good impedance matching from DC to 50 GHz is obtained with the simulated return loss greater than 14 dB.","PeriodicalId":418705,"journal":{"name":"2015 IEEE 17th Electronics Packaging and Technology Conference (EPTC)","volume":"53 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Electrical transmission characteristics of vertical transition with through silicon vias (TSVs) in 3D die stack\",\"authors\":\"K. Chang, R. Weerasekera, S. Bhattacharya\",\"doi\":\"10.1109/EPTC.2015.7412339\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Two vertical transitions with through silicon vias (TSVs) in 3D die stack are designed and their high frequency electrical characteristics are presented in this paper. The two vertical transitions consist of TSVs for obtaining electrical connection between the die front side and back side. Back side redistribution layer is eliminated in the designs to simplify the fabrication process without sacrificing the electrical performance. Design considerations and guidelines are provided to design high speed TSV structure up to 50 GHz. Different kinds of transmission line interconnects (for instance, microstrip line and coplanar waveguide) are implemented at the input/output extensions for different applications. For both vertical transition designs, the simulated insertion loss is better than 0.65 dB up to 50 GHz while good impedance matching from DC to 50 GHz is obtained with the simulated return loss greater than 14 dB.\",\"PeriodicalId\":418705,\"journal\":{\"name\":\"2015 IEEE 17th Electronics Packaging and Technology Conference (EPTC)\",\"volume\":\"53 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE 17th Electronics Packaging and Technology Conference (EPTC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EPTC.2015.7412339\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE 17th Electronics Packaging and Technology Conference (EPTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPTC.2015.7412339","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Electrical transmission characteristics of vertical transition with through silicon vias (TSVs) in 3D die stack
Two vertical transitions with through silicon vias (TSVs) in 3D die stack are designed and their high frequency electrical characteristics are presented in this paper. The two vertical transitions consist of TSVs for obtaining electrical connection between the die front side and back side. Back side redistribution layer is eliminated in the designs to simplify the fabrication process without sacrificing the electrical performance. Design considerations and guidelines are provided to design high speed TSV structure up to 50 GHz. Different kinds of transmission line interconnects (for instance, microstrip line and coplanar waveguide) are implemented at the input/output extensions for different applications. For both vertical transition designs, the simulated insertion loss is better than 0.65 dB up to 50 GHz while good impedance matching from DC to 50 GHz is obtained with the simulated return loss greater than 14 dB.