用于MPSoC寿命预测的IJTAG兼容模拟嵌入式仪器

J. Pathrose, Ghazanfar Ali, H. Kerkhoff
{"title":"用于MPSoC寿命预测的IJTAG兼容模拟嵌入式仪器","authors":"J. Pathrose, Ghazanfar Ali, H. Kerkhoff","doi":"10.1109/LATW.2018.8349691","DOIUrl":null,"url":null,"abstract":"Decreasing reliability of nanometer CMOS technologies with each technology generation is a bottleneck for development of dependable Cyber Physical Systems. This paper presents two analogue health monitors, namely IDDT and temperature along with their integration to the IJTAG network for MPSoC life-time prediction. The monitors are integrated as embedded instruments in a MPSoC. A technique for dynamic synthesis of the analogue front-end for the IDDT instrument and an architecture for integrating analogue embedded instruments into an IJTAG network is introduced in this paper. The embedded instruments have been designed in TSMC 40nm CMOS technology.","PeriodicalId":236190,"journal":{"name":"2018 IEEE 19th Latin-American Test Symposium (LATS)","volume":"75 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-03-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"IJTAG compatible analogue embedded instruments for MPSoC life-time prediction\",\"authors\":\"J. Pathrose, Ghazanfar Ali, H. Kerkhoff\",\"doi\":\"10.1109/LATW.2018.8349691\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Decreasing reliability of nanometer CMOS technologies with each technology generation is a bottleneck for development of dependable Cyber Physical Systems. This paper presents two analogue health monitors, namely IDDT and temperature along with their integration to the IJTAG network for MPSoC life-time prediction. The monitors are integrated as embedded instruments in a MPSoC. A technique for dynamic synthesis of the analogue front-end for the IDDT instrument and an architecture for integrating analogue embedded instruments into an IJTAG network is introduced in this paper. The embedded instruments have been designed in TSMC 40nm CMOS technology.\",\"PeriodicalId\":236190,\"journal\":{\"name\":\"2018 IEEE 19th Latin-American Test Symposium (LATS)\",\"volume\":\"75 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-03-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE 19th Latin-American Test Symposium (LATS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/LATW.2018.8349691\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE 19th Latin-American Test Symposium (LATS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/LATW.2018.8349691","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5

摘要

随着每一代技术的发展,纳米CMOS技术的可靠性不断降低,这是发展可靠的网络物理系统的瓶颈。本文介绍了两个模拟健康监测器,即IDDT和温度,以及它们与IJTAG网络的集成,用于MPSoC寿命预测。监视器作为嵌入式仪器集成在MPSoC中。本文介绍了一种IDDT仪器模拟前端动态综合技术和一种将模拟嵌入式仪器集成到IJTAG网络中的体系结构。嵌入式仪器采用台积电40nm CMOS工艺设计。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
IJTAG compatible analogue embedded instruments for MPSoC life-time prediction
Decreasing reliability of nanometer CMOS technologies with each technology generation is a bottleneck for development of dependable Cyber Physical Systems. This paper presents two analogue health monitors, namely IDDT and temperature along with their integration to the IJTAG network for MPSoC life-time prediction. The monitors are integrated as embedded instruments in a MPSoC. A technique for dynamic synthesis of the analogue front-end for the IDDT instrument and an architecture for integrating analogue embedded instruments into an IJTAG network is introduced in this paper. The embedded instruments have been designed in TSMC 40nm CMOS technology.
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