{"title":"提高连续ATPG性能的技术","authors":"E. Macii, A. Meo","doi":"10.1109/VTEST.1992.232762","DOIUrl":null,"url":null,"abstract":"An automatic test pattern generation (ATPG) system for sequential circuits is described. Techniques such as testability measures, 9-valued functions, incompatibility function and fault simulation have been added to the basic algorithm in order to increase the fault coverage and reduce the test generation time. The entire ATPG system has been benchmarked on the set of ISCAS89 circuits.<<ETX>>","PeriodicalId":434977,"journal":{"name":"Digest of Papers. 1992 IEEE VLSI Test Symposium","volume":"52 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-04-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Techniques to increase sequential ATPG performance\",\"authors\":\"E. Macii, A. Meo\",\"doi\":\"10.1109/VTEST.1992.232762\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An automatic test pattern generation (ATPG) system for sequential circuits is described. Techniques such as testability measures, 9-valued functions, incompatibility function and fault simulation have been added to the basic algorithm in order to increase the fault coverage and reduce the test generation time. The entire ATPG system has been benchmarked on the set of ISCAS89 circuits.<<ETX>>\",\"PeriodicalId\":434977,\"journal\":{\"name\":\"Digest of Papers. 1992 IEEE VLSI Test Symposium\",\"volume\":\"52 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1992-04-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Digest of Papers. 1992 IEEE VLSI Test Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VTEST.1992.232762\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Digest of Papers. 1992 IEEE VLSI Test Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTEST.1992.232762","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Techniques to increase sequential ATPG performance
An automatic test pattern generation (ATPG) system for sequential circuits is described. Techniques such as testability measures, 9-valued functions, incompatibility function and fault simulation have been added to the basic algorithm in order to increase the fault coverage and reduce the test generation time. The entire ATPG system has been benchmarked on the set of ISCAS89 circuits.<>