{"title":"基于Xilinx Virtex fpga的系统双层故障管理器","authors":"I. Herrera-Alzu, M. López-Vallejo, C. G. Soriano","doi":"10.1109/DFT.2015.7315138","DOIUrl":null,"url":null,"abstract":"Systems based on Xilinx Virtex series FPGAs can benefit, compared to traditional rad-hard technologies, from high performance, high logic density and dynamic reconfiguration capability. However, the underlying SRAM technology is sensitive to ionizing radiation, which can induce faults that must be managed to improve system's dependability. This paper proposes a Dual-Layer Fault Manager concept, which aims at managing both configuration and application faults, dynamically balancing redundancy level, dependability and functionality. This concept has been prototyped and its initial test results are discussed.","PeriodicalId":383972,"journal":{"name":"2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Dual-Layer Fault Manager for systems based on Xilinx Virtex FPGAs\",\"authors\":\"I. Herrera-Alzu, M. López-Vallejo, C. G. Soriano\",\"doi\":\"10.1109/DFT.2015.7315138\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Systems based on Xilinx Virtex series FPGAs can benefit, compared to traditional rad-hard technologies, from high performance, high logic density and dynamic reconfiguration capability. However, the underlying SRAM technology is sensitive to ionizing radiation, which can induce faults that must be managed to improve system's dependability. This paper proposes a Dual-Layer Fault Manager concept, which aims at managing both configuration and application faults, dynamically balancing redundancy level, dependability and functionality. This concept has been prototyped and its initial test results are discussed.\",\"PeriodicalId\":383972,\"journal\":{\"name\":\"2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS)\",\"volume\":\"35 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DFT.2015.7315138\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DFT.2015.7315138","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Dual-Layer Fault Manager for systems based on Xilinx Virtex FPGAs
Systems based on Xilinx Virtex series FPGAs can benefit, compared to traditional rad-hard technologies, from high performance, high logic density and dynamic reconfiguration capability. However, the underlying SRAM technology is sensitive to ionizing radiation, which can induce faults that must be managed to improve system's dependability. This paper proposes a Dual-Layer Fault Manager concept, which aims at managing both configuration and application faults, dynamically balancing redundancy level, dependability and functionality. This concept has been prototyped and its initial test results are discussed.