一种用于智能功率集成电路的新型器件——沟槽横向DMOSFET

1998 International Semiconductor Conference. CAS'98 Proceedings (Cat. No.98TH8351) Pub Date : 1998-10-06 DOI:10.1109/SMICND.1998.732307

M. Zitouni, F. Morancho, H. Tranduc, P. Rossel, J. Buxo, I. Pagès

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引用次数: 7

摘要

本文提出了一种用于中压(<100伏)智能电源集成电路的横向DMOSFET的新概念。这种结构称为LUDMOSFET，具有降低的导通电阻和增强的击穿电压。例如，击穿电压为50v时，导通电阻为1.2 m/spl ω /。在传统的LDMOSFET中为0.8 m/spl ω /。在没有多晶硅的LUDMOS中，cm/sup 2/(即减少30%)和0.6 m/spl Omega/。在使用多晶硅的LUDMOS(即减少50%)中，cm/sup 2/。

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A new device for smart power integrated circuits - the trench lateral DMOSFET

In this paper, a new concept of lateral DMOSFET for medium voltage (<100 Volts) Smart Power Integrated Circuits is proposed. This structure called LUDMOSFET features a reduced specific on-resistance and enhanced breakdown voltage. For example, for a breakdown voltage of 50 V, the specific on-resistance is 1.2 m/spl Omega/.cm/sup 2/ in the conventional LDMOSFET, 0.8 m/spl Omega/.cm/sup 2/ in the LUDMOS without polysilicon (i.e. 30 percent reduction) and 0.6 m/spl Omega/.cm/sup 2/ in the LUDMOS with polysilicon (i.e. 50 percent reduction).

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1998 International Semiconductor Conference. CAS'98 Proceedings (Cat. No.98TH8351)

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