用简单近似法模拟逻辑电路中电阻性短路的逻辑/IDDQ测试

Hung-Jen Lin, L. Milor
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引用次数: 0

摘要

存在电阻性短路的逻辑电路通常表现出模拟行为,这在计算上是昂贵的。本文介绍了一种称为简单近似的数值方法,用于电阻短路的逻辑/IDDQ测试仿真。用晶体管栅极-漏极短路和栅极-源短路的实例电路证明了该方法的可行性。与SPICE模拟相比,结果显示计算时间减少了95%,但代价是数值精度降低,这在该应用中通常是可以接受的。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Simulation of logic/IDDQ tests for resistive shorts in logic circuits by using simplicial approximation
Logic circuits in the presence of resistive shorts often exhibit analog behavior which can be computationally expensive to simulate. This paper introduces a numerical method called simplicial approximation for its application to simulation of logic/IDDQ tests for resistive shorts. Example circuits with transistor gate-to-drain and gate-to-source shorts are used to demonstrate the feasibility of the method. The results, when compared to SPICE simulation, show a 95% reduction in computational time at the price of less numerical accuracy, which is generally acceptable in this application.
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