R. Roucou, V. Fiori, F. Cacho, K. Inal, X. Boddaert
{"title":"探测工艺参数和PAD设计的评估:解决机械问题的实验和建模相关性","authors":"R. Roucou, V. Fiori, F. Cacho, K. Inal, X. Boddaert","doi":"10.1109/ESIME.2010.5464594","DOIUrl":null,"url":null,"abstract":"Electrical Wafer Sort is known to induce stress in the pad structure and can lead to mechanical failures. In the present work, both EWS process (over drive and number of passes) and die pad design (thicknesses and interconnect layer architectures) parameters are evaluated through actual tests and Finite Element Modelling.","PeriodicalId":152004,"journal":{"name":"2010 11th International Thermal, Mechanical & Multi-Physics Simulation, and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-04-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Evaluation of probing process parameters and PAD designs: Experiments and modelling correlations for solving mechanical issues\",\"authors\":\"R. Roucou, V. Fiori, F. Cacho, K. Inal, X. Boddaert\",\"doi\":\"10.1109/ESIME.2010.5464594\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Electrical Wafer Sort is known to induce stress in the pad structure and can lead to mechanical failures. In the present work, both EWS process (over drive and number of passes) and die pad design (thicknesses and interconnect layer architectures) parameters are evaluated through actual tests and Finite Element Modelling.\",\"PeriodicalId\":152004,\"journal\":{\"name\":\"2010 11th International Thermal, Mechanical & Multi-Physics Simulation, and Experiments in Microelectronics and Microsystems (EuroSimE)\",\"volume\":\"23 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-04-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 11th International Thermal, Mechanical & Multi-Physics Simulation, and Experiments in Microelectronics and Microsystems (EuroSimE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESIME.2010.5464594\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 11th International Thermal, Mechanical & Multi-Physics Simulation, and Experiments in Microelectronics and Microsystems (EuroSimE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESIME.2010.5464594","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Evaluation of probing process parameters and PAD designs: Experiments and modelling correlations for solving mechanical issues
Electrical Wafer Sort is known to induce stress in the pad structure and can lead to mechanical failures. In the present work, both EWS process (over drive and number of passes) and die pad design (thicknesses and interconnect layer architectures) parameters are evaluated through actual tests and Finite Element Modelling.