采用W2W直接键合和TSV的CMOS图像传感器三维集成技术

N. Pham, N. Tutunjyan, Danny Volkaerts, Lan Peng, Geraldine Jamison, D. Tezcan
{"title":"采用W2W直接键合和TSV的CMOS图像传感器三维集成技术","authors":"N. Pham, N. Tutunjyan, Danny Volkaerts, Lan Peng, Geraldine Jamison, D. Tezcan","doi":"10.1109/EPTC.2015.7412378","DOIUrl":null,"url":null,"abstract":"This paper presents a 3D integration technology for imager application using wafer level permanent oxide to oxide bonding and TSV process for backside illuminated (BSI) CMOS image sensor (CIS). The process allows the stacking and electrical connection of two chips-illuminated imager chip on top of a readout and image processing chip by mean of a via last style TSV.","PeriodicalId":418705,"journal":{"name":"2015 IEEE 17th Electronics Packaging and Technology Conference (EPTC)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"3D integration technology using W2W direct bonding and TSV for CMOS based image sensors\",\"authors\":\"N. Pham, N. Tutunjyan, Danny Volkaerts, Lan Peng, Geraldine Jamison, D. Tezcan\",\"doi\":\"10.1109/EPTC.2015.7412378\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a 3D integration technology for imager application using wafer level permanent oxide to oxide bonding and TSV process for backside illuminated (BSI) CMOS image sensor (CIS). The process allows the stacking and electrical connection of two chips-illuminated imager chip on top of a readout and image processing chip by mean of a via last style TSV.\",\"PeriodicalId\":418705,\"journal\":{\"name\":\"2015 IEEE 17th Electronics Packaging and Technology Conference (EPTC)\",\"volume\":\"12 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE 17th Electronics Packaging and Technology Conference (EPTC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EPTC.2015.7412378\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE 17th Electronics Packaging and Technology Conference (EPTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPTC.2015.7412378","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3

摘要

本文提出了一种基于晶圆级永久氧化键合和TSV工艺的成像仪三维集成技术。该工艺允许两个芯片的堆叠和电气连接,照明成像仪芯片在读出和图像处理芯片的顶部,通过通过最后一种风格的TSV。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
3D integration technology using W2W direct bonding and TSV for CMOS based image sensors
This paper presents a 3D integration technology for imager application using wafer level permanent oxide to oxide bonding and TSV process for backside illuminated (BSI) CMOS image sensor (CIS). The process allows the stacking and electrical connection of two chips-illuminated imager chip on top of a readout and image processing chip by mean of a via last style TSV.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信