N. Pham, N. Tutunjyan, Danny Volkaerts, Lan Peng, Geraldine Jamison, D. Tezcan
{"title":"采用W2W直接键合和TSV的CMOS图像传感器三维集成技术","authors":"N. Pham, N. Tutunjyan, Danny Volkaerts, Lan Peng, Geraldine Jamison, D. Tezcan","doi":"10.1109/EPTC.2015.7412378","DOIUrl":null,"url":null,"abstract":"This paper presents a 3D integration technology for imager application using wafer level permanent oxide to oxide bonding and TSV process for backside illuminated (BSI) CMOS image sensor (CIS). The process allows the stacking and electrical connection of two chips-illuminated imager chip on top of a readout and image processing chip by mean of a via last style TSV.","PeriodicalId":418705,"journal":{"name":"2015 IEEE 17th Electronics Packaging and Technology Conference (EPTC)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"3D integration technology using W2W direct bonding and TSV for CMOS based image sensors\",\"authors\":\"N. Pham, N. Tutunjyan, Danny Volkaerts, Lan Peng, Geraldine Jamison, D. Tezcan\",\"doi\":\"10.1109/EPTC.2015.7412378\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a 3D integration technology for imager application using wafer level permanent oxide to oxide bonding and TSV process for backside illuminated (BSI) CMOS image sensor (CIS). The process allows the stacking and electrical connection of two chips-illuminated imager chip on top of a readout and image processing chip by mean of a via last style TSV.\",\"PeriodicalId\":418705,\"journal\":{\"name\":\"2015 IEEE 17th Electronics Packaging and Technology Conference (EPTC)\",\"volume\":\"12 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE 17th Electronics Packaging and Technology Conference (EPTC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EPTC.2015.7412378\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE 17th Electronics Packaging and Technology Conference (EPTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPTC.2015.7412378","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
3D integration technology using W2W direct bonding and TSV for CMOS based image sensors
This paper presents a 3D integration technology for imager application using wafer level permanent oxide to oxide bonding and TSV process for backside illuminated (BSI) CMOS image sensor (CIS). The process allows the stacking and electrical connection of two chips-illuminated imager chip on top of a readout and image processing chip by mean of a via last style TSV.